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LLVM 22.0.0git
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#include "llvm/ADT/BitVector.h"#include "llvm/ADT/SmallPtrSet.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/SmallVector.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/Support/Compiler.h"Go to the source code of this file.
Classes | |
| class | llvm::GISelAddressing::BaseIndexOffset |
| Helper struct to store a base, index and offset that forms an address. More... | |
| class | llvm::LoadStoreOpt |
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::GISelAddressing |
Functions | |
| LLVM_ABI BaseIndexOffset | llvm::GISelAddressing::getPointerInfo (Register Ptr, MachineRegisterInfo &MRI) |
Returns a BaseIndexOffset which describes the pointer in Ptr. | |
| LLVM_ABI bool | llvm::GISelAddressing::aliasIsKnownForLoadStore (const MachineInstr &MI1, const MachineInstr &MI2, bool &IsAlias, MachineRegisterInfo &MRI) |
Compute whether or not a memory access at MI1 aliases with an access at MI2. | |
| LLVM_ABI bool | llvm::GISelAddressing::instMayAlias (const MachineInstr &MI, const MachineInstr &Other, MachineRegisterInfo &MRI, AliasAnalysis *AA) |
Returns true if the instruction MI may alias Other. | |