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LLVM 22.0.0git
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#include "PPCInstrInfo.h"#include "MCTargetDesc/PPCPredicates.h"#include "PPC.h"#include "PPCHazardRecognizers.h"#include "PPCInstrBuilder.h"#include "PPCMachineFunctionInfo.h"#include "PPCTargetMachine.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/Statistic.h"#include "llvm/CodeGen/LiveIntervals.h"#include "llvm/CodeGen/LivePhysRegs.h"#include "llvm/CodeGen/MachineCombinerPattern.h"#include "llvm/CodeGen/MachineConstantPool.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineMemOperand.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/PseudoSourceValue.h"#include "llvm/CodeGen/RegisterClassInfo.h"#include "llvm/CodeGen/RegisterPressure.h"#include "llvm/CodeGen/RegisterScavenging.h"#include "llvm/CodeGen/ScheduleDAG.h"#include "llvm/CodeGen/SlotIndexes.h"#include "llvm/CodeGen/StackMaps.h"#include "llvm/IR/Module.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/raw_ostream.h"#include "PPCGenInstrInfo.inc"#include "llvm/TargetParser/PPCTargetParser.def"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "ppc-instr-info" |
| #define | GET_INSTRMAP_INFO |
| #define | GET_INSTRINFO_CTOR_DTOR |
| #define | InfoArrayIdxFMAInst 0 |
| #define | InfoArrayIdxFAddInst 1 |
| #define | InfoArrayIdxFMULInst 2 |
| #define | InfoArrayIdxAddOpIdx 3 |
| #define | InfoArrayIdxMULOpIdx 4 |
| #define | InfoArrayIdxFSubInst 5 |
| #define | PPC_LNX_DEFINE_OFFSETS |
| #define | PPC_TGT_PARSER_UNDEF_MACROS |
Functions | |
| STATISTIC (NumStoreSPILLVSRRCAsVec, "Number of spillvsrrc spilled to stack as vec") | |
| STATISTIC (NumStoreSPILLVSRRCAsGpr, "Number of spillvsrrc spilled to stack as gpr") | |
| STATISTIC (NumGPRtoVSRSpill, "Number of gpr spills to spillvsrrc") | |
| STATISTIC (CmpIselsConverted, "Number of ISELs that depend on comparison of constants converted") | |
| STATISTIC (MissedConvertibleImmediateInstrs, "Number of compare-immediate instructions fed by constants") | |
| STATISTIC (NumRcRotatesConvertedToRcAnd, "Number of record-form rotates converted to record-form andi") | |
| static unsigned | getCRBitValue (unsigned CRBit) |
| static bool | MBBDefinesCTR (MachineBasicBlock &MBB) |
| static bool | isLdStSafeToCluster (const MachineInstr &LdSt, const TargetRegisterInfo *TRI) |
| static bool | isClusterableLdStOpcPair (unsigned FirstOpc, unsigned SecondOpc, const PPCSubtarget &Subtarget) |
| static bool | isAnImmediateOperand (const MachineOperand &MO) |
| static unsigned | selectReg (int64_t Imm1, int64_t Imm2, unsigned CompareOpc, unsigned TrueReg, unsigned FalseReg, unsigned CRSubReg) |
| static void | swapMIOperands (MachineInstr &MI, unsigned Op1, unsigned Op2) |
| static bool | isOpZeroOfSubwordPreincLoad (int Opcode) |
| static bool | definedBySignExtendingOp (const unsigned Reg, const MachineRegisterInfo *MRI) |
| static bool | definedByZeroExtendingOp (const unsigned Reg, const MachineRegisterInfo *MRI) |
Variables | |
| static cl::opt< bool > | DisableCTRLoopAnal ("disable-ppc-ctrloop-analysis", cl::Hidden, cl::desc("Disable analysis for CTR loops")) |
| static cl::opt< bool > | DisableCmpOpt ("disable-ppc-cmp-opt", cl::desc("Disable compare instruction optimization"), cl::Hidden) |
| static cl::opt< bool > | VSXSelfCopyCrash ("crash-on-ppc-vsx-self-copy", cl::desc("Causes the backend to crash instead of generating a nop VSX copy"), cl::Hidden) |
| static cl::opt< bool > | UseOldLatencyCalc ("ppc-old-latency-calc", cl::Hidden, cl::desc("Use the old (incorrect) instruction latency calculation")) |
| static cl::opt< float > | FMARPFactor ("ppc-fma-rp-factor", cl::Hidden, cl::init(1.5), cl::desc("register pressure factor for the transformations.")) |
| static cl::opt< bool > | EnableFMARegPressureReduction ("ppc-fma-rp-reduction", cl::Hidden, cl::init(true), cl::desc("enable register pressure reduce in machine combiner pass.")) |
| static const uint16_t | FMAOpIdxInfo [][6] |
| const unsigned | MAX_BINOP_DEPTH = 1 |
| #define DEBUG_TYPE "ppc-instr-info" |
Definition at line 47 of file PPCInstrInfo.cpp.
| #define GET_INSTRINFO_CTOR_DTOR |
Definition at line 50 of file PPCInstrInfo.cpp.
| #define GET_INSTRMAP_INFO |
Definition at line 49 of file PPCInstrInfo.cpp.
| #define InfoArrayIdxAddOpIdx 3 |
Definition at line 273 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::getFMAPatterns().
| #define InfoArrayIdxFAddInst 1 |
Definition at line 271 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::getFMAPatterns().
| #define InfoArrayIdxFMAInst 0 |
Definition at line 270 of file PPCInstrInfo.cpp.
| #define InfoArrayIdxFMULInst 2 |
Definition at line 272 of file PPCInstrInfo.cpp.
| #define InfoArrayIdxFSubInst 5 |
Definition at line 275 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::getFMAPatterns().
| #define InfoArrayIdxMULOpIdx 4 |
Definition at line 274 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::finalizeInsInstrs(), and llvm::PPCInstrInfo::getFMAPatterns().
| #define PPC_LNX_DEFINE_OFFSETS |
| #define PPC_TGT_PARSER_UNDEF_MACROS |
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Definition at line 5191 of file PPCInstrInfo.cpp.
References isOpZeroOfSubwordPreincLoad(), llvm::Register::isVirtualRegister(), MI, MRI, Reg, and TII.
Referenced by llvm::PPCInstrInfo::isSignOrZeroExtended().
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Definition at line 5238 of file PPCInstrInfo.cpp.
References isOpZeroOfSubwordPreincLoad(), llvm::Register::isVirtualRegister(), MI, MRI, Reg, and TII.
Referenced by llvm::PPCInstrInfo::isSignOrZeroExtended().
Definition at line 1650 of file PPCInstrInfo.cpp.
References assert().
Referenced by llvm::PPCInstrInfo::copyPhysReg().
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Definition at line 3131 of file PPCInstrInfo.cpp.
References llvm::MachineOperand::isCPI(), llvm::MachineOperand::isGlobal(), and llvm::MachineOperand::isImm().
Referenced by llvm::PPCInstrInfo::expandPostRAPseudo().
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Definition at line 2925 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::shouldClusterMemOps().
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Definition at line 2905 of file PPCInstrInfo.cpp.
References assert(), llvm::MachineInstr::getNumExplicitOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineInstr::hasOrderedMemoryRef(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isReg(), llvm::MachineInstr::modifiesRegister(), and TRI.
Referenced by llvm::PPCInstrInfo::shouldClusterMemOps().
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Definition at line 5183 of file PPCInstrInfo.cpp.
Referenced by definedBySignExtendingOp(), and definedByZeroExtendingOp().
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Definition at line 2182 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::isProfitableToIfCvt().
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Definition at line 3317 of file PPCInstrInfo.cpp.
References llvm_unreachable.
| STATISTIC | ( | CmpIselsConverted | , |
| "Number of ISELs that depend on comparison of constants converted" | ) |
| STATISTIC | ( | MissedConvertibleImmediateInstrs | , |
| "Number of compare-immediate instructions fed by constants" | ) |
| STATISTIC | ( | NumGPRtoVSRSpill | , |
| "Number of gpr spills to spillvsrrc" | ) |
| STATISTIC | ( | NumRcRotatesConvertedToRcAnd | , |
| "Number of record-form rotates converted to record-form andi" | ) |
| STATISTIC | ( | NumStoreSPILLVSRRCAsGpr | , |
| "Number of spillvsrrc spilled to stack as gpr" | ) |
| STATISTIC | ( | NumStoreSPILLVSRRCAsVec | , |
| "Number of spillvsrrc spilled to stack as vec" | ) |
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Definition at line 4420 of file PPCInstrInfo.cpp.
References assert(), llvm::SmallVectorTemplateCommon< T, typename >::back(), MI, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().
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Referenced by llvm::PPCInstrInfo::optimizeCompareInstr().
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Referenced by llvm::PPCInstrInfo::analyzeBranch().
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Referenced by llvm::PPCInstrInfo::shouldReduceRegisterPressure().
Definition at line 284 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::finalizeInsInstrs(), and llvm::PPCInstrInfo::getFMAPatterns().
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Referenced by llvm::PPCInstrInfo::shouldReduceRegisterPressure().
Definition at line 5307 of file PPCInstrInfo.cpp.
Referenced by llvm::PPCInstrInfo::isSignOrZeroExtended(), and llvm::PPCInstrInfo::promoteInstr32To64ForElimEXTSW().
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Referenced by llvm::PPCInstrInfo::getInstrLatency().
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Referenced by llvm::PPCInstrInfo::copyPhysReg().