This is the complete list of members for llvm::SystemZInstrInfo, including all inherited members.

analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override	llvm::SystemZInstrInfo
analyzeCompare(const MachineInstr &MI, Register &SrcReg, Register &SrcReg2, int64_t &Mask, int64_t &Value) const override	llvm::SystemZInstrInfo
areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, const MachineInstr &MIb) const override	llvm::SystemZInstrInfo
canInsertSelect(const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, Register, Register, Register, int &, int &, int &) const override	llvm::SystemZInstrInfo
commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned CommuteOpIdx1, unsigned CommuteOpIdx2) const override	llvm::SystemZInstrInfo	protected
convertToThreeAddress(MachineInstr &MI, LiveVariables LV, LiveIntervals LIS) const override	llvm::SystemZInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override	llvm::SystemZInstrInfo
expandPostRAPseudo(MachineInstr &MBBI) const override	llvm::SystemZInstrInfo
foldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg, MachineRegisterInfo *MRI) const override	llvm::SystemZInstrInfo
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex, LiveIntervals LIS=nullptr, VirtRegMap VRM=nullptr) const override	llvm::SystemZInstrInfo
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI, LiveIntervals *LIS=nullptr) const override	llvm::SystemZInstrInfo
getBranchInfo(const MachineInstr &MI) const	llvm::SystemZInstrInfo
getConstValDefinedInReg(const MachineInstr &MI, const Register Reg, int64_t &ImmVal) const override	llvm::SystemZInstrInfo
getFusedCompare(unsigned Opcode, SystemZII::FusedCompareType Type, const MachineInstr *MI=nullptr) const	llvm::SystemZInstrInfo
getInstSizeInBytes(const MachineInstr &MI) const override	llvm::SystemZInstrInfo
getInverseOpcode(unsigned Opcode) const override	llvm::SystemZInstrInfo
getLoadAndTest(unsigned Opcode) const	llvm::SystemZInstrInfo
getLoadAndTrap(unsigned Opcode) const	llvm::SystemZInstrInfo
getLoadStoreOpcodes(const TargetRegisterClass *RC, unsigned &LoadOpcode, unsigned &StoreOpcode) const	llvm::SystemZInstrInfo
getOpcodeForOffset(unsigned Opcode, int64_t Offset, const MachineInstr *MI=nullptr) const	llvm::SystemZInstrInfo
getRegisterInfo() const	llvm::SystemZInstrInfo	inline
hasDisplacementPairInsn(unsigned Opcode) const	llvm::SystemZInstrInfo
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override	llvm::SystemZInstrInfo
insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, Register DstReg, ArrayRef< MachineOperand > Cond, Register TrueReg, Register FalseReg) const override	llvm::SystemZInstrInfo
isAssociativeAndCommutative(const MachineInstr &Inst, bool Invert) const override	llvm::SystemZInstrInfo
isCopyInstrImpl(const MachineInstr &MI) const override	llvm::SystemZInstrInfo
isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override	llvm::SystemZInstrInfo
isLoadFromStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const override	llvm::SystemZInstrInfo
isPredicable(const MachineInstr &MI) const override	llvm::SystemZInstrInfo
isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, BranchProbability Probability) const override	llvm::SystemZInstrInfo
isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const override	llvm::SystemZInstrInfo
isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumCyclesT, unsigned ExtraPredCyclesT, MachineBasicBlock &FMBB, unsigned NumCyclesF, unsigned ExtraPredCyclesF, BranchProbability Probability) const override	llvm::SystemZInstrInfo
isRxSBGMask(uint64_t Mask, unsigned BitSize, unsigned &Start, unsigned &End) const	llvm::SystemZInstrInfo
isStackSlotCopy(const MachineInstr &MI, int &DestFrameIndex, int &SrcFrameIndex) const override	llvm::SystemZInstrInfo
isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override	llvm::SystemZInstrInfo
isStoreToStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const override	llvm::SystemZInstrInfo
loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned Reg, uint64_t Value) const	llvm::SystemZInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIdx, const TargetRegisterClass RC, const TargetRegisterInfo TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override	llvm::SystemZInstrInfo
PredicateInstruction(MachineInstr &MI, ArrayRef< MachineOperand > Pred) const override	llvm::SystemZInstrInfo
prepareCompareSwapOperands(MachineBasicBlock::iterator MBBI) const	llvm::SystemZInstrInfo
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override	llvm::SystemZInstrInfo
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override	llvm::SystemZInstrInfo
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass RC, const TargetRegisterInfo TRI, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override	llvm::SystemZInstrInfo
SystemZInstrInfo(const SystemZSubtarget &STI)	llvm::SystemZInstrInfo	explicit
useMachineCombiner() const override	llvm::SystemZInstrInfo	inline
verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const override	llvm::SystemZInstrInfo