RenameIndependentSubregs pass leaves large partially used super registers, for example: undef %0.sub4:VReg_1024 = ... %0.sub5:VReg_1024 = ... %0.sub6:VReg_1024 = ... %0.sub7:VReg_1024 = ... use %0.sub4_sub5_sub6_sub7 use %0.sub6_sub7. More...

#include "GCNRewritePartialRegUses.h"
#include "AMDGPU.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIRegisterInfo.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/Pass.h"

Macros
#define	DEBUG_TYPE "rewrite-partial-reg-uses"

Functions
	INITIALIZE_PASS_BEGIN (GCNRewritePartialRegUsesLegacy, DEBUG_TYPE, "Rewrite Partial Register Uses", false, false) INITIALIZE_PASS_END(GCNRewritePartialRegUsesLegacy

Variables
	DEBUG_TYPE
Rewrite Partial Register	Uses
Rewrite Partial Register	false

Detailed Description

RenameIndependentSubregs pass leaves large partially used super registers, for example: undef %0.sub4:VReg_1024 = ... %0.sub5:VReg_1024 = ... %0.sub6:VReg_1024 = ... %0.sub7:VReg_1024 = ... use %0.sub4_sub5_sub6_sub7 use %0.sub6_sub7.

GCNRewritePartialRegUses goes right after RenameIndependentSubregs and rewrites such partially used super registers with registers of minimal size: undef %0.sub0:VReg_128 = ... %0.sub1:VReg_128 = ... %0.sub2:VReg_128 = ... %0.sub3:VReg_128 = ... use %0.sub0_sub1_sub2_sub3 use %0.sub2_sub3

This allows to avoid subreg lanemasks tracking during register pressure calculation and creates more possibilities for the code unaware of lanemasks

Definition in file GCNRewritePartialRegUses.cpp.