26#define DEBUG_TYPE "instcombine"
30 cl::desc(
"Verify that computeKnownBits() and "
31 "SimplifyDemandedBits() are consistent"),
35 "instcombine-simplify-vector-elts-depth",
37 "Depth limit when simplifying vector instructions and their operands"),
44 const APInt &Demanded) {
46 assert(OpNo < I->getNumOperands() &&
"Operand index too large");
55 if (
C->isSubsetOf(Demanded))
59 I->setOperand(OpNo, ConstantInt::get(
Op->getType(), *
C & Demanded));
71 const APInt &DemandedMask,
74 assert(
I->getOpcode() == Instruction::LShr &&
75 "Only lshr instruction supported");
79 if (!
match(
I->getOperand(0),
89 if (DemandedBitWidth > ShlAmt)
93 if (
Upper->getType()->getScalarSizeInBits() < ShlAmt + DemandedBitWidth)
100 Value *ShrAmt =
I->getOperand(1);
105 if (~KnownShrBits.
Zero != ShlAmt)
124 if (
unsigned BitWidth = Ty->getScalarSizeInBits())
127 return DL.getPointerTypeSizeInBits(Ty);
136 SQ.getWithInstruction(&Inst));
137 if (!V)
return false;
138 if (V == &Inst)
return true;
154 const APInt &DemandedMask,
158 Use &U =
I->getOperandUse(OpNo);
166 if (DemandedMask.
isZero()) {
191 if (!NewVal)
return false;
223 const APInt &DemandedMask,
227 assert(
I !=
nullptr &&
"Null pointer of Value???");
230 Type *VTy =
I->getType();
234 "Value *V, DemandedMask and Known must have same BitWidth");
240 auto disableWrapFlagsBasedOnUnusedHighBits = [](
Instruction *
I,
246 I->setHasNoSignedWrap(
false);
247 I->setHasNoUnsignedWrap(
false);
254 auto simplifyOperandsBasedOnUnusedHighBits = [&](
APInt &DemandedFromOps) {
263 disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
269 switch (
I->getOpcode()) {
273 case Instruction::And: {
291 return I->getOperand(0);
293 return I->getOperand(1);
301 case Instruction::Or: {
307 I->dropPoisonGeneratingFlags();
322 return I->getOperand(0);
324 return I->getOperand(1);
333 RHSCache(
I->getOperand(1), RHSKnown);
342 case Instruction::Xor: {
347 if (DemandedMask == 1 &&
354 return Builder.CreateUnaryIntrinsic(Intrinsic::ctpop,
Xor);
368 return I->getOperand(0);
370 return I->getOperand(1);
377 BinaryOperator::CreateOr(
I->getOperand(0),
I->getOperand(1));
391 ~RHSKnown.
One & DemandedMask);
401 if ((*
C | ~DemandedMask).isAllOnes()) {
417 if (LHSInst->getOpcode() == Instruction::And && LHSInst->hasOneUse() &&
420 (LHSKnown.One & RHSKnown.
One & DemandedMask) != 0) {
421 APInt NewMask = ~(LHSKnown.One & RHSKnown.
One & DemandedMask);
424 Instruction *NewAnd = BinaryOperator::CreateAnd(
I->getOperand(0), AndC);
428 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC);
434 case Instruction::Select: {
444 auto CanonicalizeSelectConstant = [](
Instruction *
I,
unsigned OpNo,
445 const APInt &DemandedMask) {
465 if ((*CmpC & DemandedMask) == (*SelC & DemandedMask)) {
466 I->setOperand(OpNo, ConstantInt::get(
I->getType(), *CmpC));
471 if (CanonicalizeSelectConstant(
I, 1, DemandedMask) ||
472 CanonicalizeSelectConstant(
I, 2, DemandedMask))
483 case Instruction::Trunc: {
497 return Builder.CreateLShr(Trunc,
C->getZExtValue());
502 case Instruction::ZExt: {
503 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
511 I->dropPoisonGeneratingFlags();
515 if (
I->getOpcode() == Instruction::ZExt &&
I->hasNonNeg() &&
522 case Instruction::SExt: {
524 unsigned SrcBitWidth =
I->getOperand(0)->getType()->getScalarSizeInBits();
526 APInt InputDemandedBits = DemandedMask.
trunc(SrcBitWidth);
531 InputDemandedBits.
setBit(SrcBitWidth-1);
552 case Instruction::Add: {
553 if ((DemandedMask & 1) == 0) {
559 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType()) {
569 return Builder.CreateSExt(AndNot, VTy);
574 X->getType()->isIntOrIntVectorTy(1) &&
X->getType() ==
Y->getType() &&
575 (
I->getOperand(0)->hasOneUse() ||
I->getOperand(1)->hasOneUse())) {
596 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
602 APInt DemandedFromLHS = DemandedFromOps;
606 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
611 return I->getOperand(0);
612 if (DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
613 return I->getOperand(1);
622 return Builder.CreateXor(
I->getOperand(0), ConstantInt::get(VTy, *
C));
632 case Instruction::Sub: {
639 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
645 APInt DemandedFromLHS = DemandedFromOps;
649 return disableWrapFlagsBasedOnUnusedHighBits(
I, NLZ);
654 return I->getOperand(0);
657 if (DemandedFromOps.
isOne() && DemandedFromOps.
isSubsetOf(LHSKnown.Zero))
658 return I->getOperand(1);
666 return Builder.CreateNot(
I->getOperand(1));
675 case Instruction::Mul: {
676 APInt DemandedFromOps;
677 if (simplifyOperandsBasedOnUnusedHighBits(DemandedFromOps))
687 Constant *ShiftC = ConstantInt::get(VTy, CTZ);
688 Instruction *Shl = BinaryOperator::CreateShl(
I->getOperand(0), ShiftC);
695 if (
I->getOperand(0) ==
I->getOperand(1) && DemandedMask.
ult(4)) {
696 Constant *One = ConstantInt::get(VTy, 1);
697 Instruction *And1 = BinaryOperator::CreateAnd(
I->getOperand(0), One);
704 case Instruction::Shl: {
711 DemandedMask, Known))
715 if (
I->hasOneUse()) {
717 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
719 auto [IID, FShiftArgs] = *Opt;
720 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
721 FShiftArgs[0] == FShiftArgs[1]) {
733 if (
I->hasNoSignedWrap()) {
737 if (SignBits > ShiftAmt && SignBits - ShiftAmt >= NumHiDemandedBits)
738 return I->getOperand(0);
748 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
752 LeftShiftAmtC,
DL) ==
C) {
753 Instruction *Lshr = BinaryOperator::CreateLShr(NewC,
X);
759 APInt DemandedMaskIn(DemandedMask.
lshr(ShiftAmt));
783 I->dropPoisonGeneratingFlags();
791 case Instruction::LShr: {
797 if (
I->hasOneUse()) {
799 if (Inst && Inst->getOpcode() == BinaryOperator::Or) {
801 auto [IID, FShiftArgs] = *Opt;
802 if ((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &&
803 FShiftArgs[0] == FShiftArgs[1]) {
819 if (SignBits >= NumHiDemandedBits)
820 return I->getOperand(0);
829 Constant *RightShiftAmtC = ConstantInt::get(VTy, ShiftAmt);
833 RightShiftAmtC,
DL) ==
C) {
840 if (
match(
I->getOperand(0),
844 X, ConstantInt::get(
X->getType(), Factor->
lshr(ShiftAmt)));
850 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
853 I->dropPoisonGeneratingFlags();
868 case Instruction::AShr: {
874 if (SignBits >= NumHiDemandedBits)
875 return I->getOperand(0);
881 if (DemandedMask.
isOne()) {
884 I->getOperand(0),
I->getOperand(1),
I->getName());
893 APInt DemandedMaskIn(DemandedMask.
shl(ShiftAmt));
896 bool ShiftedInBitsDemanded = DemandedMask.
countl_zero() < ShiftAmt;
897 if (ShiftedInBitsDemanded)
901 I->dropPoisonGeneratingFlags();
907 if (Known.
Zero[
BitWidth - 1] || !ShiftedInBitsDemanded) {
917 ShiftAmt != 0,
I->isExact());
923 case Instruction::UDiv: {
929 APInt DemandedMaskIn =
934 I->dropPoisonGeneratingFlags();
945 case Instruction::SRem: {
948 if (DemandedMask.
ult(*Rem))
949 return I->getOperand(0);
951 APInt LowBits = *Rem - 1;
962 case Instruction::Call: {
963 bool KnownBitsComputed =
false;
965 switch (
II->getIntrinsicID()) {
966 case Intrinsic::abs: {
967 if (DemandedMask == 1)
968 return II->getArgOperand(0);
971 case Intrinsic::ctpop: {
979 II->getModule(), Intrinsic::ctpop, VTy);
984 case Intrinsic::bswap: {
1001 NewVal = BinaryOperator::CreateLShr(
1002 II->getArgOperand(0), ConstantInt::get(VTy, NLZ - NTZ));
1004 NewVal = BinaryOperator::CreateShl(
1005 II->getArgOperand(0), ConstantInt::get(VTy, NTZ - NLZ));
1011 case Intrinsic::ptrmask: {
1012 unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
1017 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
1018 RHSKnown, Q,
Depth + 1))
1024 Known = LHSKnown & RHSKnown;
1025 KnownBitsComputed =
true;
1040 if (DemandedMask.
isSubsetOf(RHSKnown.One | LHSKnown.Zero))
1041 return I->getOperand(0);
1045 I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth)))
1060 if (!LHSKnown.isZero()) {
1061 const unsigned trailingZeros = LHSKnown.countMinTrailingZeros();
1064 uint64_t HighBitsGEPIndex = GEPIndex & ~PointerAlignBits;
1066 GEPIndex & PointerAlignBits & PtrMaskImmediate;
1068 uint64_t MaskedGEPIndex = HighBitsGEPIndex | MaskedLowBitsGEPIndex;
1070 if (MaskedGEPIndex != GEPIndex) {
1073 Type *GEPIndexType =
1074 DL.getIndexType(
GEP->getPointerOperand()->getType());
1076 GEP->getSourceElementType(), InnerPtr,
1077 ConstantInt::get(GEPIndexType, MaskedGEPIndex),
1078 GEP->getName(),
GEP->isInBounds());
1089 case Intrinsic::fshr:
1090 case Intrinsic::fshl: {
1098 if (
II->getIntrinsicID() == Intrinsic::fshr)
1101 APInt DemandedMaskLHS(DemandedMask.
lshr(ShiftAmt));
1103 if (
I->getOperand(0) !=
I->getOperand(1)) {
1109 I->dropPoisonGeneratingReturnAttributes();
1116 if (DemandedMaskLHS.
isSubsetOf(LHSKnown.Zero | LHSKnown.One) &&
1130 LHSKnown <<= ShiftAmt;
1133 KnownBitsComputed =
true;
1136 case Intrinsic::umax: {
1143 CTZ >=
C->getActiveBits())
1144 return II->getArgOperand(0);
1147 case Intrinsic::umin: {
1155 CTZ >=
C->getBitWidth() -
C->countl_one())
1156 return II->getArgOperand(0);
1162 *
II, DemandedMask, Known, KnownBitsComputed);
1170 if (!KnownBitsComputed)
1176 if (
I->getType()->isPointerTy()) {
1177 Align Alignment =
I->getPointerAlignment(
DL);
1185 if (!
I->getType()->isPointerTy() &&
1191 if (Known != ReferenceKnown) {
1192 errs() <<
"Mismatched known bits for " << *
I <<
" in "
1193 <<
I->getFunction()->getName() <<
"\n";
1194 errs() <<
"computeKnownBits(): " << ReferenceKnown <<
"\n";
1195 errs() <<
"SimplifyDemandedBits(): " << Known <<
"\n";
1210 Type *ITy =
I->getType();
1219 switch (
I->getOpcode()) {
1220 case Instruction::And: {
1235 return I->getOperand(0);
1237 return I->getOperand(1);
1241 case Instruction::Or: {
1258 return I->getOperand(0);
1260 return I->getOperand(1);
1264 case Instruction::Xor: {
1280 return I->getOperand(0);
1282 return I->getOperand(1);
1286 case Instruction::Add: {
1294 return I->getOperand(0);
1298 return I->getOperand(1);
1306 case Instruction::Sub: {
1314 return I->getOperand(0);
1323 case Instruction::AShr: {
1336 const APInt *ShiftRC;
1337 const APInt *ShiftLC;
1385 if (!ShlOp1 || !ShrOp1)
1390 unsigned BitWidth = Ty->getScalarSizeInBits();
1399 Known.
Zero &= DemandedMask;
1404 bool isLshr = (Shr->
getOpcode() == Instruction::LShr);
1405 BitMask1 = isLshr ? (BitMask1.
lshr(ShrAmt) << ShlAmt) :
1406 (BitMask1.
ashr(ShrAmt) << ShlAmt);
1408 if (ShrAmt <= ShlAmt) {
1409 BitMask2 <<= (ShlAmt - ShrAmt);
1411 BitMask2 = isLshr ? BitMask2.
lshr(ShrAmt - ShlAmt):
1412 BitMask2.
ashr(ShrAmt - ShlAmt);
1416 if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
1417 if (ShrAmt == ShlAmt)
1424 if (ShrAmt < ShlAmt) {
1426 New = BinaryOperator::CreateShl(VarX, Amt);
1432 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) :
1433 BinaryOperator::CreateAShr(VarX, Amt);
1435 New->setIsExact(
true);
1461 bool AllowMultipleUsers) {
1469 assert((DemandedElts & ~EltMask) == 0 &&
"Invalid DemandedElts!");
1473 PoisonElts = EltMask;
1477 if (DemandedElts.
isZero()) {
1478 PoisonElts = EltMask;
1493 for (
unsigned i = 0; i != VWidth; ++i) {
1494 if (!DemandedElts[i]) {
1500 Constant *Elt =
C->getAggregateElement(i);
1501 if (!Elt)
return nullptr;
1510 return NewCV !=
C ? NewCV :
nullptr;
1517 if (!AllowMultipleUsers) {
1521 if (!V->hasOneUse()) {
1530 DemandedElts = EltMask;
1535 if (!
I)
return nullptr;
1537 bool MadeChange =
false;
1538 auto simplifyAndSetOp = [&](
Instruction *Inst,
unsigned OpNum,
1548 APInt PoisonElts2(VWidth, 0);
1549 APInt PoisonElts3(VWidth, 0);
1550 switch (
I->getOpcode()) {
1553 case Instruction::GetElementPtr: {
1571 for (
unsigned i = 0; i <
I->getNumOperands(); i++) {
1575 PoisonElts = EltMask;
1578 if (
I->getOperand(i)->getType()->isVectorTy()) {
1579 APInt PoisonEltsOp(VWidth, 0);
1580 simplifyAndSetOp(
I, i, DemandedElts, PoisonEltsOp);
1585 PoisonElts |= PoisonEltsOp;
1591 case Instruction::InsertElement: {
1598 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts2);
1605 APInt PreInsertDemandedElts = DemandedElts;
1607 PreInsertDemandedElts.
clearBit(IdxNo);
1615 if (PreInsertDemandedElts == 0 &&
1622 simplifyAndSetOp(
I, 0, PreInsertDemandedElts, PoisonElts);
1626 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1628 return I->getOperand(0);
1635 case Instruction::ShuffleVector: {
1637 assert(Shuffle->getOperand(0)->getType() ==
1638 Shuffle->getOperand(1)->getType() &&
1639 "Expected shuffle operands to have same type");
1644 if (
all_of(Shuffle->getShuffleMask(), [](
int Elt) { return Elt == 0; }) &&
1650 APInt LeftDemanded(OpWidth, 1);
1651 APInt LHSPoisonElts(OpWidth, 0);
1652 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1653 if (LHSPoisonElts[0])
1654 PoisonElts = EltMask;
1660 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0);
1661 for (
unsigned i = 0; i < VWidth; i++) {
1662 if (DemandedElts[i]) {
1663 unsigned MaskVal = Shuffle->getMaskValue(i);
1664 if (MaskVal != -1u) {
1665 assert(MaskVal < OpWidth * 2 &&
1666 "shufflevector mask index out of range!");
1667 if (MaskVal < OpWidth)
1668 LeftDemanded.setBit(MaskVal);
1670 RightDemanded.
setBit(MaskVal - OpWidth);
1675 APInt LHSPoisonElts(OpWidth, 0);
1676 simplifyAndSetOp(
I, 0, LeftDemanded, LHSPoisonElts);
1678 APInt RHSPoisonElts(OpWidth, 0);
1679 simplifyAndSetOp(
I, 1, RightDemanded, RHSPoisonElts);
1692 if (VWidth == OpWidth) {
1693 bool IsIdentityShuffle =
true;
1694 for (
unsigned i = 0; i < VWidth; i++) {
1695 unsigned MaskVal = Shuffle->getMaskValue(i);
1696 if (DemandedElts[i] && i != MaskVal) {
1697 IsIdentityShuffle =
false;
1701 if (IsIdentityShuffle)
1702 return Shuffle->getOperand(0);
1705 bool NewPoisonElts =
false;
1706 unsigned LHSIdx = -1u, LHSValIdx = -1u;
1707 unsigned RHSIdx = -1u, RHSValIdx = -1u;
1708 bool LHSUniform =
true;
1709 bool RHSUniform =
true;
1710 for (
unsigned i = 0; i < VWidth; i++) {
1711 unsigned MaskVal = Shuffle->getMaskValue(i);
1712 if (MaskVal == -1u) {
1714 }
else if (!DemandedElts[i]) {
1715 NewPoisonElts =
true;
1717 }
else if (MaskVal < OpWidth) {
1718 if (LHSPoisonElts[MaskVal]) {
1719 NewPoisonElts =
true;
1722 LHSIdx = LHSIdx == -1u ? i : OpWidth;
1723 LHSValIdx = LHSValIdx == -1u ? MaskVal : OpWidth;
1724 LHSUniform = LHSUniform && (MaskVal == i);
1727 if (RHSPoisonElts[MaskVal - OpWidth]) {
1728 NewPoisonElts =
true;
1731 RHSIdx = RHSIdx == -1u ? i : OpWidth;
1732 RHSValIdx = RHSValIdx == -1u ? MaskVal - OpWidth : OpWidth;
1733 RHSUniform = RHSUniform && (MaskVal - OpWidth == i);
1749 if (LHSIdx < OpWidth && RHSUniform) {
1751 Op = Shuffle->getOperand(1);
1752 Value = CV->getOperand(LHSValIdx);
1756 if (RHSIdx < OpWidth && LHSUniform) {
1758 Op = Shuffle->getOperand(0);
1759 Value = CV->getOperand(RHSValIdx);
1772 if (NewPoisonElts) {
1775 for (
unsigned i = 0; i < VWidth; ++i) {
1779 Elts.
push_back(Shuffle->getMaskValue(i));
1781 Shuffle->setShuffleMask(Elts);
1786 case Instruction::Select: {
1796 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1800 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts);
1802 for (
unsigned i = 0; i < VWidth; i++) {
1807 DemandedLHS.clearBit(i);
1813 simplifyAndSetOp(
I, 1, DemandedLHS, PoisonElts2);
1814 simplifyAndSetOp(
I, 2, DemandedRHS, PoisonElts3);
1818 PoisonElts = PoisonElts2 & PoisonElts3;
1821 case Instruction::BitCast: {
1826 APInt InputDemandedElts(InVWidth, 0);
1827 PoisonElts2 =
APInt(InVWidth, 0);
1830 if (VWidth == InVWidth) {
1834 InputDemandedElts = DemandedElts;
1835 }
else if ((VWidth % InVWidth) == 0) {
1839 Ratio = VWidth / InVWidth;
1840 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1841 if (DemandedElts[OutIdx])
1842 InputDemandedElts.
setBit(OutIdx / Ratio);
1843 }
else if ((InVWidth % VWidth) == 0) {
1847 Ratio = InVWidth / VWidth;
1848 for (
unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
1849 if (DemandedElts[InIdx / Ratio])
1850 InputDemandedElts.
setBit(InIdx);
1856 simplifyAndSetOp(
I, 0, InputDemandedElts, PoisonElts2);
1858 if (VWidth == InVWidth) {
1859 PoisonElts = PoisonElts2;
1860 }
else if ((VWidth % InVWidth) == 0) {
1864 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
1865 if (PoisonElts2[OutIdx / Ratio])
1866 PoisonElts.
setBit(OutIdx);
1867 }
else if ((InVWidth % VWidth) == 0) {
1871 for (
unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
1874 PoisonElts.
setBit(OutIdx);
1881 case Instruction::FPTrunc:
1882 case Instruction::FPExt:
1883 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1886 case Instruction::Call: {
1889 switch (
II->getIntrinsicID()) {
1890 case Intrinsic::masked_gather:
1891 case Intrinsic::masked_load: {
1896 DemandedPassThrough(DemandedElts);
1898 for (
unsigned i = 0; i < VWidth; i++) {
1900 if (CElt->isNullValue())
1901 DemandedPtrs.clearBit(i);
1902 else if (CElt->isAllOnesValue())
1908 if (
II->getIntrinsicID() == Intrinsic::masked_gather)
1909 simplifyAndSetOp(
II, 0, DemandedPtrs, PoisonElts2);
1910 simplifyAndSetOp(
II, 2, DemandedPassThrough, PoisonElts3);
1914 PoisonElts = PoisonElts2 & PoisonElts3;
1920 *
II, DemandedElts, PoisonElts, PoisonElts2, PoisonElts3,
1954 if (DemandedElts == 1 && !
X->hasOneUse() && !
Y->hasOneUse() &&
1957 auto findShufBO = [&](
bool MatchShufAsOp0) ->
User * {
1962 Value *OtherOp = MatchShufAsOp0 ?
Y :
X;
1967 Value *ShufOp = MatchShufAsOp0 ?
X :
Y;
1978 if (
DT.dominates(U,
I))
1984 if (
User *ShufBO = findShufBO(
true))
1986 if (
User *ShufBO = findShufBO(
false))
1990 simplifyAndSetOp(
I, 0, DemandedElts, PoisonElts);
1991 simplifyAndSetOp(
I, 1, DemandedElts, PoisonElts2);
1995 PoisonElts &= PoisonElts2;
2003 return MadeChange ?
I :
nullptr;
2016 if (Ty->isAggregateType())
2037 Type *VTy = V->getType();
2041 if (DemandedMask ==
fcNone)
2051 Value *FoldedToConst =
2053 return FoldedToConst == V ? nullptr : FoldedToConst;
2056 if (!
I->hasOneUse())
2060 if (FPOp->hasNoNaNs())
2062 if (FPOp->hasNoInfs())
2065 switch (
I->getOpcode()) {
2066 case Instruction::FNeg: {
2073 case Instruction::Call: {
2076 case Intrinsic::fabs:
2082 case Intrinsic::arithmetic_fence:
2086 case Intrinsic::copysign: {
2092 if ((DemandedMask &
fcNegative) == DemandedMask) {
2094 I->setOperand(1, ConstantFP::get(VTy, -1.0));
2098 if ((DemandedMask &
fcPositive) == DemandedMask) {
2116 case Instruction::Select: {
2123 return I->getOperand(2);
2125 return I->getOperand(1);
2128 Known = KnownLHS | KnownRHS;
2143 Use &U =
I->getOperandUse(OpNo);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Register Bank Select
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file provides internal interfaces used to implement the InstCombine.
static cl::opt< unsigned > SimplifyDemandedVectorEltsDepthLimit("instcombine-simplify-vector-elts-depth", cl::desc("Depth limit when simplifying vector instructions and their operands"), cl::Hidden, cl::init(10))
static Constant * getFPClassConstant(Type *Ty, FPClassTest Mask)
For floating-point classes that resolve to a single bit pattern, return that value.
static cl::opt< bool > VerifyKnownBits("instcombine-verify-known-bits", cl::desc("Verify that computeKnownBits() and " "SimplifyDemandedBits() are consistent"), cl::Hidden, cl::init(false))
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, const APInt &Demanded)
Check to see if the specified operand of the specified instruction is a constant integer.
static Value * simplifyShiftSelectingPackedElement(Instruction *I, const APInt &DemandedMask, InstCombinerImpl &IC, unsigned Depth)
Let N = 2 * M.
This file provides the interface for the instcombine pass implementation.
uint64_t IntrinsicInst * II
This file contains the declarations for profiling metadata utility functions.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static unsigned getBitWidth(Type *Ty, const DataLayout &DL)
Returns the bitwidth of the given scalar or pointer type.
Class for arbitrary precision integers.
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
void clearBit(unsigned BitPosition)
Set a given bit to 0.
static APInt getSignMask(unsigned BitWidth)
Get the SignMask for a specific bit width.
uint64_t getZExtValue() const
Get zero extended value.
void setHighBits(unsigned hiBits)
Set the top hiBits bits.
unsigned popcount() const
Count the number of bits set.
LLVM_ABI APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
unsigned getActiveBits() const
Compute the number of active bits in the value.
LLVM_ABI APInt trunc(unsigned width) const
Truncate to new width.
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
bool isAllOnes() const
Determine if all bits are set. This is true for zero-width values.
bool isZero() const
Determine if this value is zero, i.e. all bits are clear.
LLVM_ABI APInt urem(const APInt &RHS) const
Unsigned remainder operation.
void setSignBit()
Set the sign bit to 1.
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool ult(const APInt &RHS) const
Unsigned less than comparison.
void clearAllBits()
Set every bit to 0.
unsigned countr_zero() const
Count the number of trailing zero bits.
unsigned countl_zero() const
The APInt version of std::countl_zero.
void clearLowBits(unsigned loBits)
Set bottom loBits bits to 0.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
APInt ashr(unsigned ShiftAmt) const
Arithmetic right-shift function.
APInt shl(unsigned shiftAmt) const
Left-shift function.
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Constructs an APInt value that has the bottom loBitsSet bits set.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Constructs an APInt value that has the top hiBitsSet bits set.
void setLowBits(unsigned loBits)
Set the bottom loBits bits.
bool isIntN(unsigned N) const
Check if this APInt has an N-bits unsigned integer value.
bool isOne() const
Determine if this is a value of 1.
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
BinaryOps getOpcode() const
LLVM_ABI Intrinsic::ID getIntrinsicID() const
Returns the intrinsic ID of the intrinsic called or Intrinsic::not_intrinsic if the called function i...
This class represents a function call, abstracting a target machine's calling convention.
static CallInst * Create(FunctionType *Ty, Value *F, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
This is the base class for all instructions that perform data casts.
static LLVM_ABI Constant * getInfinity(Type *Ty, bool Negative=false)
static LLVM_ABI Constant * getZero(Type *Ty, bool Negative=false)
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
const APInt & getValue() const
Return the constant as an APInt value reference.
static LLVM_ABI Constant * get(ArrayRef< Constant * > V)
This is an important base class in LLVM.
static LLVM_ABI Constant * getIntegerValue(Type *Ty, const APInt &V)
Return the value for an integer or pointer constant, or a vector thereof, with the given scalar value...
static LLVM_ABI Constant * getAllOnesValue(Type *Ty)
LLVM_ABI bool isOneValue() const
Returns true if the value is one.
static LLVM_ABI Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
LLVM_ABI Constant * getAggregateElement(unsigned Elt) const
For aggregates (struct/array/vector) return the constant that corresponds to the specified element if...
LLVM_ABI bool isNullValue() const
Return true if this is the value that would be returned by getNullValue.
A parsed version of the target data layout string in and methods for querying it.
an instruction for type-safe pointer arithmetic to access elements of arrays and structs
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
LLVM_ABI Value * CreateSelectWithUnknownProfile(Value *C, Value *True, Value *False, StringRef PassName, const Twine &Name="")
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
static InsertElementInst * Create(Value *Vec, Value *NewElt, Value *Idx, const Twine &NameStr="", InsertPosition InsertBefore=nullptr)
KnownFPClass computeKnownFPClass(Value *Val, FastMathFlags FMF, FPClassTest Interested=fcAllFlags, const Instruction *CtxI=nullptr, unsigned Depth=0) const
Value * SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &PoisonElts, unsigned Depth=0, bool AllowMultipleUsers=false) override
The specified value produces a vector with any number of elements.
bool SimplifyDemandedBits(Instruction *I, unsigned Op, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0) override
This form of SimplifyDemandedBits simplifies the specified instruction operand if possible,...
std::optional< std::pair< Intrinsic::ID, SmallVector< Value *, 3 > > > convertOrOfShiftsToFunnelShift(Instruction &Or)
Value * simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Attempts to replace I with a simpler value based on the demanded bits.
bool SimplifyDemandedFPClass(Instruction *I, unsigned Op, FPClassTest DemandedMask, KnownFPClass &Known, unsigned Depth=0)
bool SimplifyDemandedInstructionBits(Instruction &Inst)
Tries to simplify operands to an integer instruction based on its demanded bits.
Value * SimplifyMultipleUseDemandedBits(Instruction *I, const APInt &DemandedMask, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Helper routine of SimplifyDemandedUseBits.
Value * SimplifyDemandedUseFPClass(Value *V, FPClassTest DemandedMask, KnownFPClass &Known, Instruction *CxtI, unsigned Depth=0)
Attempts to replace V with a simpler value based on the demanded floating-point classes.
unsigned ComputeNumSignBits(const Value *Op, const Instruction *CxtI=nullptr, unsigned Depth=0) const
Instruction * replaceInstUsesWith(Instruction &I, Value *V)
A combiner-aware RAUW-like routine.
void replaceUse(Use &U, Value *NewValue)
Replace use and add the previously used value to the worklist.
InstructionWorklist & Worklist
A worklist of the instructions that need to be simplified.
Instruction * InsertNewInstWith(Instruction *New, BasicBlock::iterator Old)
Same as InsertNewInstBefore, but also sets the debug loc.
void computeKnownBits(const Value *V, KnownBits &Known, const Instruction *CxtI, unsigned Depth=0) const
std::optional< Value * > targetSimplifyDemandedVectorEltsIntrinsic(IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Instruction * replaceOperand(Instruction &I, unsigned OpNum, Value *V)
Replace operand of instruction and add old operand to the worklist.
std::optional< Value * > targetSimplifyDemandedUseBitsIntrinsic(IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
LLVM_ABI bool hasNoUnsignedWrap() const LLVM_READONLY
Determine whether the no unsigned wrap flag is set.
LLVM_ABI bool hasNoSignedWrap() const LLVM_READONLY
Determine whether the no signed wrap flag is set.
LLVM_ABI bool isCommutative() const LLVM_READONLY
Return true if the instruction is commutative:
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
LLVM_ABI void setIsExact(bool b=true)
Set or clear the exact flag on this instruction, which must be an operator which supports this flag.
A wrapper class for inspecting calls to intrinsic functions.
bool hasNoSignedWrap() const
Test whether this operation is known to never undergo signed overflow, aka the nsw property.
bool hasNoUnsignedWrap() const
Test whether this operation is known to never undergo unsigned overflow, aka the nuw property.
static LLVM_ABI PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
This class represents the LLVM 'select' instruction.
const Value * getCondition() const
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt64Ty(LLVMContext &C)
bool isVectorTy() const
True if this is an instance of VectorType.
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
LLVM_ABI unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
static LLVM_ABI UndefValue * get(Type *T)
Static factory methods - Return an 'undef' object of the specified type.
A Use represents the edge between a Value definition and its users.
Value * getOperand(unsigned i) const
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
bool hasOneUse() const
Return true if there is exactly one use of this value.
iterator_range< user_iterator > users()
bool hasUseList() const
Check if this Value has a use-list.
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
LLVM_ABI void takeName(Value *V)
Transfer the name from V to this value.
Base class of all SIMD vector types.
This class represents zero extension of integer types.
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
LLVM_ABI Function * getOrInsertDeclaration(Module *M, ID id, ArrayRef< Type * > Tys={})
Look up the Function declaration of the intrinsic id in the Module M.
BinaryOp_match< SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true > m_Not(const SrcTy &&Src)
Matches a register not-ed by a G_XOR.
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
class_match< PoisonValue > m_Poison()
Match an arbitrary poison constant.
cst_pred_ty< is_lowbit_mask > m_LowBitMask()
Match an integer or vector with only the low bit(s) set.
PtrAdd_match< PointerOpTy, OffsetOpTy > m_PtrAdd(const PointerOpTy &PointerOp, const OffsetOpTy &OffsetOp)
Matches GEP with i8 source element type.
BinaryOp_match< LHS, RHS, Instruction::Add > m_Add(const LHS &L, const RHS &R)
class_match< BinaryOperator > m_BinOp()
Match an arbitrary binary operation and ignore it.
BinaryOp_match< LHS, RHS, Instruction::AShr > m_AShr(const LHS &L, const RHS &R)
ap_match< APInt > m_APInt(const APInt *&Res)
Match a ConstantInt or splatted ConstantVector, binding the specified pointer to the contained APInt.
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
bool match(Val *V, const Pattern &P)
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
BinOpPred_match< LHS, RHS, is_right_shift_op > m_Shr(const LHS &L, const RHS &R)
Matches logical shift operations.
TwoOps_match< Val_t, Idx_t, Instruction::ExtractElement > m_ExtractElt(const Val_t &Val, const Idx_t &Idx)
Matches ExtractElementInst.
class_match< ConstantInt > m_ConstantInt()
Match an arbitrary ConstantInt and ignore it.
IntrinsicID_match m_Intrinsic()
Match intrinsic calls like this: m_Intrinsic<Intrinsic::fabs>(m_Value(X))
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
TwoOps_match< V1_t, V2_t, Instruction::ShuffleVector > m_Shuffle(const V1_t &v1, const V2_t &v2)
Matches ShuffleVectorInst independently of mask value.
CastInst_match< OpTy, ZExtInst > m_ZExt(const OpTy &Op)
Matches ZExt.
match_immconstant_ty m_ImmConstant()
Match an arbitrary immediate Constant and ignore it.
DisjointOr_match< LHS, RHS, true > m_c_DisjointOr(const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Add, true > m_c_Add(const LHS &L, const RHS &R)
Matches a Add with LHS and RHS in either order.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
AnyBinaryOp_match< LHS, RHS, true > m_c_BinOp(const LHS &L, const RHS &R)
Matches a BinaryOperator with LHS and RHS in either order.
BinaryOp_match< LHS, RHS, Instruction::LShr > m_LShr(const LHS &L, const RHS &R)
CmpClass_match< LHS, RHS, ICmpInst > m_ICmp(CmpPredicate &Pred, const LHS &L, const RHS &R)
BinaryOp_match< LHS, RHS, Instruction::Shl > m_Shl(const LHS &L, const RHS &R)
auto m_Undef()
Match an arbitrary undef constant.
CastInst_match< OpTy, SExtInst > m_SExt(const OpTy &Op)
Matches SExt.
is_zero m_Zero()
Match any null constant or a vector with all elements equal to 0.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
LLVM_ABI bool haveNoCommonBitsSet(const WithCache< const Value * > &LHSCache, const WithCache< const Value * > &RHSCache, const SimplifyQuery &SQ)
Return true if LHS and RHS have no common bits set.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
LLVM_ABI void computeKnownBitsFromContext(const Value *V, KnownBits &Known, const SimplifyQuery &Q, unsigned Depth=0)
Merge bits known from context-dependent facts into Known.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
int countr_one(T Value)
Count the number of ones from the least significant bit to the first zero bit.
LLVM_ABI void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI)
Assuming the instruction MI is going to be deleted, attempt to salvage debug users of MI by writing t...
constexpr T alignDown(U Value, V Align, W Skew=0)
Returns the largest unsigned integer less than or equal to Value and is Skew mod Align.
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
gep_type_iterator gep_type_end(const User *GEP)
constexpr unsigned MaxAnalysisRecursionDepth
LLVM_ABI void adjustKnownBitsForSelectArm(KnownBits &Known, Value *Cond, Value *Arm, bool Invert, const SimplifyQuery &Q, unsigned Depth=0)
Adjust Known for the given select Arm to include information from the select Cond.
LLVM_ABI FPClassTest fneg(FPClassTest Mask)
Return the test mask which returns true if the value's sign bit is flipped.
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
LLVM_ABI void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr, bool UseInstrInfo=true, unsigned Depth=0)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
LLVM_ABI FPClassTest inverse_fabs(FPClassTest Mask)
Return the test mask which returns true after fabs is applied to the value.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI Constant * ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS, Constant *RHS, const DataLayout &DL)
Attempt to constant fold a binary operation with the specified operands.
constexpr int PoisonMaskElem
LLVM_ABI raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
@ Mul
Product of integers.
@ Xor
Bitwise or logical XOR of integers.
LLVM_ABI FPClassTest unknown_sign(FPClassTest Mask)
Return the test mask which returns true if the value could have the same set of classes,...
DWARFExpression::Operation Op
constexpr unsigned BitWidth
LLVM_ABI KnownBits analyzeKnownBitsFromAndXorOr(const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS, const SimplifyQuery &SQ, unsigned Depth=0)
Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
gep_type_iterator gep_type_begin(const User *GEP)
unsigned Log2(Align A)
Returns the log2 of the alignment.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static KnownBits makeConstant(const APInt &C)
Create known bits from a known constant.
KnownBits anyextOrTrunc(unsigned BitWidth) const
Return known bits for an "any" extension or truncation of the value we're tracking.
bool isNonNegative() const
Returns true if this value is known to be non-negative.
void makeNonNegative()
Make this value non-negative.
static LLVM_ABI KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS, bool ShAmtNonZero=false, bool Exact=false)
Compute known bits for ashr(LHS, RHS).
unsigned getBitWidth() const
Get the bit width of this value.
void resetAll()
Resets the known state of all bits.
KnownBits unionWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for either this or RHS or both.
KnownBits intersectWith(const KnownBits &RHS) const
Returns KnownBits information that is known to be true for both this and RHS.
KnownBits sext(unsigned BitWidth) const
Return known bits for a sign extension of the value we're tracking.
static KnownBits add(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from addition of LHS and RHS.
KnownBits zextOrTrunc(unsigned BitWidth) const
Return known bits for a zero extension or truncation of the value we're tracking.
APInt getMaxValue() const
Return the maximal unsigned value possible given these KnownBits.
static LLVM_ABI KnownBits srem(const KnownBits &LHS, const KnownBits &RHS)
Compute known bits for srem(LHS, RHS).
static LLVM_ABI KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS, bool Exact=false)
Compute known bits for udiv(LHS, RHS).
bool isNegative() const
Returns true if this value is known to be negative.
static KnownBits sub(const KnownBits &LHS, const KnownBits &RHS, bool NSW=false, bool NUW=false)
Compute knownbits resulting from subtraction of LHS and RHS.
static LLVM_ABI KnownBits shl(const KnownBits &LHS, const KnownBits &RHS, bool NUW=false, bool NSW=false, bool ShAmtNonZero=false)
Compute known bits for shl(LHS, RHS).
FPClassTest KnownFPClasses
Floating-point classes the value could be one of.
void copysign(const KnownFPClass &Sign)
bool isKnownNever(FPClassTest Mask) const
Return true if it's known this can never be one of the mask entries.