LLVM 22.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
39#include "llvm/IR/Value.h"
43#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
72 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
73 return Name;
74 const TargetLowering &TLI = G->getTargetLoweringInfo();
75 const char *Name = TLI.getTargetNodeName(getOpcode());
76 if (Name) return Name;
77 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
78 }
79 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
80
81 // clang-format off
82#ifndef NDEBUG
83 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
84#endif
85 case ISD::PREFETCH: return "Prefetch";
86 case ISD::MEMBARRIER: return "MemBarrier";
87 case ISD::ATOMIC_FENCE: return "AtomicFence";
88 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
89 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
90 case ISD::ATOMIC_SWAP: return "AtomicSwap";
91 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
92 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
93 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
94 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
95 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
96 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
97 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
98 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
99 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
100 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
101 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
102 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
103 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
104 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
105 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
106 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
107 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
108 case ISD::ATOMIC_LOAD_UINC_WRAP:
109 return "AtomicLoadUIncWrap";
110 case ISD::ATOMIC_LOAD_UDEC_WRAP:
111 return "AtomicLoadUDecWrap";
112 case ISD::ATOMIC_LOAD_USUB_COND:
113 return "AtomicLoadUSubCond";
114 case ISD::ATOMIC_LOAD_USUB_SAT:
115 return "AtomicLoadUSubSat";
116 case ISD::ATOMIC_LOAD: return "AtomicLoad";
117 case ISD::ATOMIC_STORE: return "AtomicStore";
118 case ISD::PCMARKER: return "PCMarker";
119 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
120 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
121 case ISD::SRCVALUE: return "SrcValue";
122 case ISD::MDNODE_SDNODE: return "MDNode";
123 case ISD::EntryToken: return "EntryToken";
124 case ISD::TokenFactor: return "TokenFactor";
125 case ISD::AssertSext: return "AssertSext";
126 case ISD::AssertZext: return "AssertZext";
127 case ISD::AssertNoFPClass: return "AssertNoFPClass";
128 case ISD::AssertAlign: return "AssertAlign";
129
130 case ISD::BasicBlock: return "BasicBlock";
131 case ISD::VALUETYPE: return "ValueType";
132 case ISD::Register: return "Register";
133 case ISD::RegisterMask: return "RegisterMask";
134 case ISD::Constant:
135 if (cast<ConstantSDNode>(this)->isOpaque())
136 return "OpaqueConstant";
137 return "Constant";
138 case ISD::ConstantFP: return "ConstantFP";
139 case ISD::GlobalAddress: return "GlobalAddress";
140 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
141 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
142 case ISD::FrameIndex: return "FrameIndex";
143 case ISD::JumpTable: return "JumpTable";
144 case ISD::JUMP_TABLE_DEBUG_INFO:
145 return "JUMP_TABLE_DEBUG_INFO";
146 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
147 case ISD::RETURNADDR: return "RETURNADDR";
148 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
149 case ISD::FRAMEADDR: return "FRAMEADDR";
150 case ISD::SPONENTRY: return "SPONENTRY";
151 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
152 case ISD::READ_REGISTER: return "READ_REGISTER";
153 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
154 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
155 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
156 case ISD::EH_RETURN: return "EH_RETURN";
157 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
158 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
159 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
160 case ISD::ConstantPool: return "ConstantPool";
161 case ISD::TargetIndex: return "TargetIndex";
162 case ISD::ExternalSymbol: return "ExternalSymbol";
163 case ISD::BlockAddress: return "BlockAddress";
167 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
168 unsigned IID = getOperand(OpNo)->getAsZExtVal();
169 if (IID < Intrinsic::num_intrinsics)
171 if (!G)
172 return "Unknown intrinsic";
173 llvm_unreachable("Invalid intrinsic ID");
174 }
175
176 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
178 if (cast<ConstantSDNode>(this)->isOpaque())
179 return "OpaqueTargetConstant";
180 return "TargetConstant";
181
182 case ISD::TargetConstantFP: return "TargetConstantFP";
183 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
184 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
185 case ISD::TargetFrameIndex: return "TargetFrameIndex";
186 case ISD::TargetJumpTable: return "TargetJumpTable";
187 case ISD::TargetConstantPool: return "TargetConstantPool";
188 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
189 case ISD::MCSymbol: return "MCSymbol";
190 case ISD::TargetBlockAddress: return "TargetBlockAddress";
191
192 case ISD::CopyToReg: return "CopyToReg";
193 case ISD::CopyFromReg: return "CopyFromReg";
194 case ISD::UNDEF: return "undef";
195 case ISD::POISON: return "poison";
196 case ISD::VSCALE: return "vscale";
197 case ISD::MERGE_VALUES: return "merge_values";
198 case ISD::INLINEASM: return "inlineasm";
199 case ISD::INLINEASM_BR: return "inlineasm_br";
200 case ISD::EH_LABEL: return "eh_label";
201 case ISD::ANNOTATION_LABEL: return "annotation_label";
202 case ISD::HANDLENODE: return "handlenode";
203
204 // Unary operators
205 case ISD::FABS: return "fabs";
206 case ISD::FMINNUM: return "fminnum";
207 case ISD::STRICT_FMINNUM: return "strict_fminnum";
208 case ISD::FMAXNUM: return "fmaxnum";
209 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
210 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
211 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
212 case ISD::FMINIMUM: return "fminimum";
213 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
214 case ISD::FMAXIMUM: return "fmaximum";
215 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
216 case ISD::FMINIMUMNUM: return "fminimumnum";
217 case ISD::FMAXIMUMNUM: return "fmaximumnum";
218 case ISD::FNEG: return "fneg";
219 case ISD::FSQRT: return "fsqrt";
220 case ISD::STRICT_FSQRT: return "strict_fsqrt";
221 case ISD::FCBRT: return "fcbrt";
222 case ISD::FSIN: return "fsin";
223 case ISD::STRICT_FSIN: return "strict_fsin";
224 case ISD::FCOS: return "fcos";
225 case ISD::STRICT_FCOS: return "strict_fcos";
226 case ISD::FSINCOS: return "fsincos";
227 case ISD::FSINCOSPI: return "fsincospi";
228 case ISD::FMODF: return "fmodf";
229 case ISD::FTAN: return "ftan";
230 case ISD::STRICT_FTAN: return "strict_ftan";
231 case ISD::FASIN: return "fasin";
232 case ISD::STRICT_FASIN: return "strict_fasin";
233 case ISD::FACOS: return "facos";
234 case ISD::STRICT_FACOS: return "strict_facos";
235 case ISD::FATAN: return "fatan";
236 case ISD::STRICT_FATAN: return "strict_fatan";
237 case ISD::FATAN2: return "fatan2";
238 case ISD::STRICT_FATAN2: return "strict_fatan2";
239 case ISD::FSINH: return "fsinh";
240 case ISD::STRICT_FSINH: return "strict_fsinh";
241 case ISD::FCOSH: return "fcosh";
242 case ISD::STRICT_FCOSH: return "strict_fcosh";
243 case ISD::FTANH: return "ftanh";
244 case ISD::STRICT_FTANH: return "strict_ftanh";
245 case ISD::FTRUNC: return "ftrunc";
246 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
247 case ISD::FFLOOR: return "ffloor";
248 case ISD::STRICT_FFLOOR: return "strict_ffloor";
249 case ISD::FCEIL: return "fceil";
250 case ISD::STRICT_FCEIL: return "strict_fceil";
251 case ISD::FRINT: return "frint";
252 case ISD::STRICT_FRINT: return "strict_frint";
253 case ISD::FNEARBYINT: return "fnearbyint";
254 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
255 case ISD::FROUND: return "fround";
256 case ISD::STRICT_FROUND: return "strict_fround";
257 case ISD::FROUNDEVEN: return "froundeven";
258 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
259 case ISD::FEXP: return "fexp";
260 case ISD::STRICT_FEXP: return "strict_fexp";
261 case ISD::FEXP2: return "fexp2";
262 case ISD::STRICT_FEXP2: return "strict_fexp2";
263 case ISD::FEXP10: return "fexp10";
264 case ISD::FLOG: return "flog";
265 case ISD::STRICT_FLOG: return "strict_flog";
266 case ISD::FLOG2: return "flog2";
267 case ISD::STRICT_FLOG2: return "strict_flog2";
268 case ISD::FLOG10: return "flog10";
269 case ISD::STRICT_FLOG10: return "strict_flog10";
270
271 // Binary operators
272 case ISD::ADD: return "add";
273 case ISD::PTRADD: return "ptradd";
274 case ISD::SUB: return "sub";
275 case ISD::MUL: return "mul";
276 case ISD::MULHU: return "mulhu";
277 case ISD::MULHS: return "mulhs";
278 case ISD::AVGFLOORU: return "avgflooru";
279 case ISD::AVGFLOORS: return "avgfloors";
280 case ISD::AVGCEILU: return "avgceilu";
281 case ISD::AVGCEILS: return "avgceils";
282 case ISD::ABDS: return "abds";
283 case ISD::ABDU: return "abdu";
284 case ISD::SDIV: return "sdiv";
285 case ISD::UDIV: return "udiv";
286 case ISD::SREM: return "srem";
287 case ISD::UREM: return "urem";
288 case ISD::SMUL_LOHI: return "smul_lohi";
289 case ISD::UMUL_LOHI: return "umul_lohi";
290 case ISD::SDIVREM: return "sdivrem";
291 case ISD::UDIVREM: return "udivrem";
292 case ISD::AND: return "and";
293 case ISD::OR: return "or";
294 case ISD::XOR: return "xor";
295 case ISD::SHL: return "shl";
296 case ISD::SRA: return "sra";
297 case ISD::SRL: return "srl";
298 case ISD::ROTL: return "rotl";
299 case ISD::ROTR: return "rotr";
300 case ISD::FSHL: return "fshl";
301 case ISD::FSHR: return "fshr";
302 case ISD::FADD: return "fadd";
303 case ISD::STRICT_FADD: return "strict_fadd";
304 case ISD::FSUB: return "fsub";
305 case ISD::STRICT_FSUB: return "strict_fsub";
306 case ISD::FMUL: return "fmul";
307 case ISD::STRICT_FMUL: return "strict_fmul";
308 case ISD::FDIV: return "fdiv";
309 case ISD::STRICT_FDIV: return "strict_fdiv";
310 case ISD::FMA: return "fma";
311 case ISD::STRICT_FMA: return "strict_fma";
312 case ISD::FMAD: return "fmad";
313 case ISD::FMULADD: return "fmuladd";
314 case ISD::FREM: return "frem";
315 case ISD::STRICT_FREM: return "strict_frem";
316 case ISD::FCOPYSIGN: return "fcopysign";
317 case ISD::FGETSIGN: return "fgetsign";
318 case ISD::FCANONICALIZE: return "fcanonicalize";
319 case ISD::IS_FPCLASS: return "is_fpclass";
320 case ISD::FPOW: return "fpow";
321 case ISD::STRICT_FPOW: return "strict_fpow";
322 case ISD::SMIN: return "smin";
323 case ISD::SMAX: return "smax";
324 case ISD::UMIN: return "umin";
325 case ISD::UMAX: return "umax";
326 case ISD::SCMP: return "scmp";
327 case ISD::UCMP: return "ucmp";
328
329 case ISD::FLDEXP: return "fldexp";
330 case ISD::STRICT_FLDEXP: return "strict_fldexp";
331 case ISD::FFREXP: return "ffrexp";
332 case ISD::FPOWI: return "fpowi";
333 case ISD::STRICT_FPOWI: return "strict_fpowi";
334 case ISD::SETCC: return "setcc";
335 case ISD::SETCCCARRY: return "setcccarry";
336 case ISD::STRICT_FSETCC: return "strict_fsetcc";
337 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
338 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
339 case ISD::SELECT: return "select";
340 case ISD::VSELECT: return "vselect";
341 case ISD::SELECT_CC: return "select_cc";
342 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
343 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
344 case ISD::CONCAT_VECTORS: return "concat_vectors";
345 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
346 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
347 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
348 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
349 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
350 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
351 case ISD::VECTOR_SPLICE: return "vector_splice";
352 case ISD::SPLAT_VECTOR: return "splat_vector";
353 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
354 case ISD::VECTOR_REVERSE: return "vector_reverse";
355 case ISD::STEP_VECTOR: return "step_vector";
356 case ISD::CARRY_FALSE: return "carry_false";
357 case ISD::ADDC: return "addc";
358 case ISD::ADDE: return "adde";
359 case ISD::UADDO_CARRY: return "uaddo_carry";
360 case ISD::SADDO_CARRY: return "saddo_carry";
361 case ISD::SADDO: return "saddo";
362 case ISD::UADDO: return "uaddo";
363 case ISD::SSUBO: return "ssubo";
364 case ISD::USUBO: return "usubo";
365 case ISD::SMULO: return "smulo";
366 case ISD::UMULO: return "umulo";
367 case ISD::SUBC: return "subc";
368 case ISD::SUBE: return "sube";
369 case ISD::USUBO_CARRY: return "usubo_carry";
370 case ISD::SSUBO_CARRY: return "ssubo_carry";
371 case ISD::SHL_PARTS: return "shl_parts";
372 case ISD::SRA_PARTS: return "sra_parts";
373 case ISD::SRL_PARTS: return "srl_parts";
374
375 case ISD::SADDSAT: return "saddsat";
376 case ISD::UADDSAT: return "uaddsat";
377 case ISD::SSUBSAT: return "ssubsat";
378 case ISD::USUBSAT: return "usubsat";
379 case ISD::SSHLSAT: return "sshlsat";
380 case ISD::USHLSAT: return "ushlsat";
381
382 case ISD::SMULFIX: return "smulfix";
383 case ISD::SMULFIXSAT: return "smulfixsat";
384 case ISD::UMULFIX: return "umulfix";
385 case ISD::UMULFIXSAT: return "umulfixsat";
386
387 case ISD::SDIVFIX: return "sdivfix";
388 case ISD::SDIVFIXSAT: return "sdivfixsat";
389 case ISD::UDIVFIX: return "udivfix";
390 case ISD::UDIVFIXSAT: return "udivfixsat";
391
392 // Conversion operators.
393 case ISD::SIGN_EXTEND: return "sign_extend";
394 case ISD::ZERO_EXTEND: return "zero_extend";
395 case ISD::ANY_EXTEND: return "any_extend";
396 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
397 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
398 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
399 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
400 case ISD::TRUNCATE: return "truncate";
401 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
402 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
403 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
404 case ISD::FP_ROUND: return "fp_round";
405 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
406 case ISD::FP_EXTEND: return "fp_extend";
407 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
408
409 case ISD::SINT_TO_FP: return "sint_to_fp";
410 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
411 case ISD::UINT_TO_FP: return "uint_to_fp";
412 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
413 case ISD::FP_TO_SINT: return "fp_to_sint";
414 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
415 case ISD::FP_TO_UINT: return "fp_to_uint";
416 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
417 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
418 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
419 case ISD::BITCAST: return "bitcast";
420 case ISD::ADDRSPACECAST: return "addrspacecast";
421 case ISD::FP16_TO_FP: return "fp16_to_fp";
422 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
423 case ISD::FP_TO_FP16: return "fp_to_fp16";
424 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
425 case ISD::BF16_TO_FP: return "bf16_to_fp";
426 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
427 case ISD::FP_TO_BF16: return "fp_to_bf16";
428 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
429 case ISD::LROUND: return "lround";
430 case ISD::STRICT_LROUND: return "strict_lround";
431 case ISD::LLROUND: return "llround";
432 case ISD::STRICT_LLROUND: return "strict_llround";
433 case ISD::LRINT: return "lrint";
434 case ISD::STRICT_LRINT: return "strict_lrint";
435 case ISD::LLRINT: return "llrint";
436 case ISD::STRICT_LLRINT: return "strict_llrint";
437
438 // Control flow instructions
439 case ISD::BR: return "br";
440 case ISD::BRIND: return "brind";
441 case ISD::BR_JT: return "br_jt";
442 case ISD::BRCOND: return "brcond";
443 case ISD::BR_CC: return "br_cc";
444 case ISD::CALLSEQ_START: return "callseq_start";
445 case ISD::CALLSEQ_END: return "callseq_end";
446
447 // EH instructions
448 case ISD::CATCHRET: return "catchret";
449 case ISD::CLEANUPRET: return "cleanupret";
450
451 // Other operators
452 case ISD::LOAD: return "load";
453 case ISD::STORE: return "store";
454 case ISD::MLOAD: return "masked_load";
455 case ISD::MSTORE: return "masked_store";
456 case ISD::MGATHER: return "masked_gather";
457 case ISD::MSCATTER: return "masked_scatter";
458 case ISD::VECTOR_COMPRESS: return "vector_compress";
459 case ISD::VAARG: return "vaarg";
460 case ISD::VACOPY: return "vacopy";
461 case ISD::VAEND: return "vaend";
462 case ISD::VASTART: return "vastart";
463 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
464 case ISD::EXTRACT_ELEMENT: return "extract_element";
465 case ISD::BUILD_PAIR: return "build_pair";
466 case ISD::STACKSAVE: return "stacksave";
467 case ISD::STACKRESTORE: return "stackrestore";
468 case ISD::TRAP: return "trap";
469 case ISD::DEBUGTRAP: return "debugtrap";
470 case ISD::UBSANTRAP: return "ubsantrap";
471 case ISD::LIFETIME_START: return "lifetime.start";
472 case ISD::LIFETIME_END: return "lifetime.end";
473 case ISD::FAKE_USE:
474 return "fake_use";
475 case ISD::RELOC_NONE:
476 return "reloc_none";
477 case ISD::PSEUDO_PROBE:
478 return "pseudoprobe";
479 case ISD::GC_TRANSITION_START: return "gc_transition.start";
480 case ISD::GC_TRANSITION_END: return "gc_transition.end";
481 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
482 case ISD::FREEZE: return "freeze";
483 case ISD::PREALLOCATED_SETUP:
484 return "call_setup";
485 case ISD::PREALLOCATED_ARG:
486 return "call_alloc";
487
488 // Floating point environment manipulation
489 case ISD::GET_ROUNDING: return "get_rounding";
490 case ISD::SET_ROUNDING: return "set_rounding";
491 case ISD::GET_FPENV: return "get_fpenv";
492 case ISD::SET_FPENV: return "set_fpenv";
493 case ISD::RESET_FPENV: return "reset_fpenv";
494 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
495 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
496 case ISD::GET_FPMODE: return "get_fpmode";
497 case ISD::SET_FPMODE: return "set_fpmode";
498 case ISD::RESET_FPMODE: return "reset_fpmode";
499
500 // Convergence control instructions
501 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
502 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
503 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
504 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
505
506 // Bit manipulation
507 case ISD::ABS: return "abs";
508 case ISD::BITREVERSE: return "bitreverse";
509 case ISD::BSWAP: return "bswap";
510 case ISD::CTPOP: return "ctpop";
511 case ISD::CTTZ: return "cttz";
512 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
513 case ISD::CTLZ: return "ctlz";
514 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
515 case ISD::PARITY: return "parity";
516
517 // Trampolines
518 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
519 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
520
521 // clang-format on
522
523 case ISD::CONDCODE:
524 switch (cast<CondCodeSDNode>(this)->get()) {
525 default: llvm_unreachable("Unknown setcc condition!");
526 case ISD::SETOEQ: return "setoeq";
527 case ISD::SETOGT: return "setogt";
528 case ISD::SETOGE: return "setoge";
529 case ISD::SETOLT: return "setolt";
530 case ISD::SETOLE: return "setole";
531 case ISD::SETONE: return "setone";
532
533 case ISD::SETO: return "seto";
534 case ISD::SETUO: return "setuo";
535 case ISD::SETUEQ: return "setueq";
536 case ISD::SETUGT: return "setugt";
537 case ISD::SETUGE: return "setuge";
538 case ISD::SETULT: return "setult";
539 case ISD::SETULE: return "setule";
540 case ISD::SETUNE: return "setune";
541
542 case ISD::SETEQ: return "seteq";
543 case ISD::SETGT: return "setgt";
544 case ISD::SETGE: return "setge";
545 case ISD::SETLT: return "setlt";
546 case ISD::SETLE: return "setle";
547 case ISD::SETNE: return "setne";
548
549 case ISD::SETTRUE: return "settrue";
550 case ISD::SETTRUE2: return "settrue2";
551 case ISD::SETFALSE: return "setfalse";
552 case ISD::SETFALSE2: return "setfalse2";
553 }
554 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
555 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
556 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
557 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
558 case ISD::VECREDUCE_ADD: return "vecreduce_add";
559 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
560 case ISD::VECREDUCE_AND: return "vecreduce_and";
561 case ISD::VECREDUCE_OR: return "vecreduce_or";
562 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
563 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
564 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
565 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
566 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
567 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
568 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
569 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
570 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
571 case ISD::STACKMAP:
572 return "stackmap";
573 case ISD::PATCHPOINT:
574 return "patchpoint";
575 case ISD::CLEAR_CACHE:
576 return "clear_cache";
577
578 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
579 return "histogram";
580
581 case ISD::VECTOR_FIND_LAST_ACTIVE:
582 return "find_last_active";
583
584 case ISD::GET_ACTIVE_LANE_MASK:
585 return "get_active_lane_mask";
586
587 case ISD::PARTIAL_REDUCE_UMLA:
588 return "partial_reduce_umla";
589 case ISD::PARTIAL_REDUCE_SMLA:
590 return "partial_reduce_smla";
591 case ISD::PARTIAL_REDUCE_SUMLA:
592 return "partial_reduce_sumla";
593 case ISD::PARTIAL_REDUCE_FMLA:
594 return "partial_reduce_fmla";
596 return "loop_dep_war";
598 return "loop_dep_raw";
599
600 // Vector Predication
601#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
602 case ISD::SDID: \
603 return #NAME;
604#include "llvm/IR/VPIntrinsics.def"
605 }
606}
607
609 switch (AM) {
610 default: return "";
611 case ISD::PRE_INC: return "<pre-inc>";
612 case ISD::PRE_DEC: return "<pre-dec>";
613 case ISD::POST_INC: return "<post-inc>";
614 case ISD::POST_DEC: return "<post-dec>";
615 }
616}
617
619 return Printable([&Node](raw_ostream &OS) {
620#ifndef NDEBUG
621 static const raw_ostream::Colors Color[] = {
625 };
626 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
627 OS << 't' << Node.PersistentId;
628 OS.resetColor();
629#else
630 OS << (const void*)&Node;
631#endif
632 });
633}
634
635// Print the MMO with more information from the SelectionDAG.
637 const MachineFunction *MF, const Module *M,
638 const MachineFrameInfo *MFI,
639 const TargetInstrInfo *TII, LLVMContext &Ctx) {
640 ModuleSlotTracker MST(M);
641 if (MF)
644 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
645}
646
648 const SelectionDAG *G) {
649 if (G) {
650 const MachineFunction *MF = &G->getMachineFunction();
651 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
652 &MF->getFrameInfo(),
653 G->getSubtarget().getInstrInfo(), *G->getContext());
654 }
655
656 LLVMContext Ctx;
657 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
658 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
659}
660
661#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
662LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
663
665 print(dbgs(), G);
666 dbgs() << '\n';
667}
668#endif
669
671 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
672 if (i) OS << ",";
673 if (getValueType(i) == MVT::Other)
674 OS << "ch";
675 else
676 OS << getValueType(i).getEVTString();
677 }
678}
679
682 OS << " nuw";
683
685 OS << " nsw";
686
687 if (getFlags().hasExact())
688 OS << " exact";
689
690 if (getFlags().hasDisjoint())
691 OS << " disjoint";
692
693 if (getFlags().hasSameSign())
694 OS << " samesign";
695
696 if (getFlags().hasInBounds())
697 OS << " inbounds";
698
699 if (getFlags().hasNonNeg())
700 OS << " nneg";
701
702 if (getFlags().hasNoNaNs())
703 OS << " nnan";
704
705 if (getFlags().hasNoInfs())
706 OS << " ninf";
707
708 if (getFlags().hasNoSignedZeros())
709 OS << " nsz";
710
711 if (getFlags().hasAllowReciprocal())
712 OS << " arcp";
713
714 if (getFlags().hasAllowContract())
715 OS << " contract";
716
717 if (getFlags().hasApproximateFuncs())
718 OS << " afn";
719
720 if (getFlags().hasAllowReassociation())
721 OS << " reassoc";
722
723 if (getFlags().hasNoFPExcept())
724 OS << " nofpexcept";
725
726 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
727 if (!MN->memoperands_empty()) {
728 OS << "<";
729 OS << "Mem:";
730 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
731 e = MN->memoperands_end(); i != e; ++i) {
732 printMemOperand(OS, **i, G);
733 if (std::next(i) != e)
734 OS << " ";
735 }
736 OS << ">";
737 }
738 } else if (const ShuffleVectorSDNode *SVN =
740 OS << "<";
741 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
742 int Idx = SVN->getMaskElt(i);
743 if (i) OS << ",";
744 if (Idx < 0)
745 OS << "u";
746 else
747 OS << Idx;
748 }
749 OS << ">";
750 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
751 OS << '<' << CSDN->getAPIntValue() << '>';
752 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
753 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
754 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
755 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
756 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
757 else {
758 OS << "<APFloat(";
759 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
760 OS << ")>";
761 }
762 } else if (const GlobalAddressSDNode *GADN =
764 int64_t offset = GADN->getOffset();
765 OS << '<';
766 GADN->getGlobal()->printAsOperand(OS);
767 OS << '>';
768 if (offset > 0)
769 OS << " + " << offset;
770 else
771 OS << " " << offset;
772 if (unsigned int TF = GADN->getTargetFlags())
773 OS << " [TF=" << TF << ']';
774 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
775 OS << "<" << FIDN->getIndex() << ">";
776 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
777 OS << "<" << JTDN->getIndex() << ">";
778 if (unsigned int TF = JTDN->getTargetFlags())
779 OS << " [TF=" << TF << ']';
780 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
781 int offset = CP->getOffset();
782 if (CP->isMachineConstantPoolEntry())
783 OS << "<" << *CP->getMachineCPVal() << ">";
784 else
785 OS << "<" << *CP->getConstVal() << ">";
786 if (offset > 0)
787 OS << " + " << offset;
788 else
789 OS << " " << offset;
790 if (unsigned int TF = CP->getTargetFlags())
791 OS << " [TF=" << TF << ']';
792 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
793 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
794 if (unsigned TF = TI->getTargetFlags())
795 OS << " [TF=" << TF << ']';
796 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
797 OS << "<";
798 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
799 if (LBB)
800 OS << LBB->getName() << " ";
801 OS << (const void*)BBDN->getBasicBlock() << ">";
802 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
803 OS << ' ' << printReg(R->getReg(),
804 G ? G->getSubtarget().getRegisterInfo() : nullptr);
805 } else if (const ExternalSymbolSDNode *ES =
807 OS << "'" << ES->getSymbol() << "'";
808 if (unsigned int TF = ES->getTargetFlags())
809 OS << " [TF=" << TF << ']';
810 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
811 if (M->getValue())
812 OS << "<" << M->getValue() << ">";
813 else
814 OS << "<null>";
815 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
816 if (MD->getMD())
817 OS << "<" << MD->getMD() << ">";
818 else
819 OS << "<null>";
820 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
821 OS << ":" << N->getVT();
822 }
823 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
824 OS << "<";
825
826 printMemOperand(OS, *LD->getMemOperand(), G);
827
828 bool doExt = true;
829 switch (LD->getExtensionType()) {
830 default: doExt = false; break;
831 case ISD::EXTLOAD: OS << ", anyext"; break;
832 case ISD::SEXTLOAD: OS << ", sext"; break;
833 case ISD::ZEXTLOAD: OS << ", zext"; break;
834 }
835 if (doExt)
836 OS << " from " << LD->getMemoryVT();
837
838 const char *AM = getIndexedModeName(LD->getAddressingMode());
839 if (*AM)
840 OS << ", " << AM;
841
842 OS << ">";
843 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
844 OS << "<";
845 printMemOperand(OS, *ST->getMemOperand(), G);
846
847 if (ST->isTruncatingStore())
848 OS << ", trunc to " << ST->getMemoryVT();
849
850 const char *AM = getIndexedModeName(ST->getAddressingMode());
851 if (*AM)
852 OS << ", " << AM;
853
854 OS << ">";
855 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
856 OS << "<";
857
858 printMemOperand(OS, *MLd->getMemOperand(), G);
859
860 bool doExt = true;
861 switch (MLd->getExtensionType()) {
862 default: doExt = false; break;
863 case ISD::EXTLOAD: OS << ", anyext"; break;
864 case ISD::SEXTLOAD: OS << ", sext"; break;
865 case ISD::ZEXTLOAD: OS << ", zext"; break;
866 }
867 if (doExt)
868 OS << " from " << MLd->getMemoryVT();
869
870 const char *AM = getIndexedModeName(MLd->getAddressingMode());
871 if (*AM)
872 OS << ", " << AM;
873
874 if (MLd->isExpandingLoad())
875 OS << ", expanding";
876
877 OS << ">";
878 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
879 OS << "<";
880 printMemOperand(OS, *MSt->getMemOperand(), G);
881
882 if (MSt->isTruncatingStore())
883 OS << ", trunc to " << MSt->getMemoryVT();
884
885 const char *AM = getIndexedModeName(MSt->getAddressingMode());
886 if (*AM)
887 OS << ", " << AM;
888
889 if (MSt->isCompressingStore())
890 OS << ", compressing";
891
892 OS << ">";
893 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
894 OS << "<";
895 printMemOperand(OS, *MGather->getMemOperand(), G);
896
897 bool doExt = true;
898 switch (MGather->getExtensionType()) {
899 default: doExt = false; break;
900 case ISD::EXTLOAD: OS << ", anyext"; break;
901 case ISD::SEXTLOAD: OS << ", sext"; break;
902 case ISD::ZEXTLOAD: OS << ", zext"; break;
903 }
904 if (doExt)
905 OS << " from " << MGather->getMemoryVT();
906
907 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
908 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
909 OS << ", " << Signed << " " << Scaled << " offset";
910
911 OS << ">";
912 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
913 OS << "<";
914 printMemOperand(OS, *MScatter->getMemOperand(), G);
915
916 if (MScatter->isTruncatingStore())
917 OS << ", trunc to " << MScatter->getMemoryVT();
918
919 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
920 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
921 OS << ", " << Signed << " " << Scaled << " offset";
922
923 OS << ">";
924 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
925 OS << "<";
926 printMemOperand(OS, *M->getMemOperand(), G);
927 if (auto *A = dyn_cast<AtomicSDNode>(M))
928 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
929 bool doExt = true;
930 switch (A->getExtensionType()) {
931 default: doExt = false; break;
932 case ISD::EXTLOAD: OS << ", anyext"; break;
933 case ISD::SEXTLOAD: OS << ", sext"; break;
934 case ISD::ZEXTLOAD: OS << ", zext"; break;
935 }
936 if (doExt)
937 OS << " from " << A->getMemoryVT();
938 }
939 OS << ">";
940 } else if (const BlockAddressSDNode *BA =
942 int64_t offset = BA->getOffset();
943 OS << "<";
944 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
945 OS << ", ";
946 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
947 OS << ">";
948 if (offset > 0)
949 OS << " + " << offset;
950 else
951 OS << " " << offset;
952 if (unsigned int TF = BA->getTargetFlags())
953 OS << " [TF=" << TF << ']';
954 } else if (const AddrSpaceCastSDNode *ASC =
956 OS << '['
957 << ASC->getSrcAddressSpace()
958 << " -> "
959 << ASC->getDestAddressSpace()
960 << ']';
961 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
962 OS << '<' << AA->getAlign().value() << '>';
963 }
964
965 if (VerboseDAGDumping) {
966 if (unsigned Order = getIROrder())
967 OS << " [ORD=" << Order << ']';
968
969 if (getNodeId() != -1)
970 OS << " [ID=" << getNodeId() << ']';
971 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
972 OS << " # D:" << isDivergent();
973
974 if (G && !G->GetDbgValues(this).empty()) {
975 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
976 for (SDDbgValue *Dbg : G->GetDbgValues(this))
977 if (!Dbg->isInvalidated())
978 Dbg->print(OS);
979 } else if (getHasDebugValue())
980 OS << " [NoOfDbgValues>0]";
981
982 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
983 OS << " [pcsections ";
984 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
985 OS << ']';
986 }
987
988 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
989 OS << " [mmra ";
990 MMRA->printAsOperand(OS,
991 G->getMachineFunction().getFunction().getParent());
992 OS << ']';
993 }
994 }
995}
996
998 OS << " DbgVal(Order=" << getOrder() << ')';
999 if (isInvalidated())
1000 OS << "(Invalidated)";
1001 if (isEmitted())
1002 OS << "(Emitted)";
1003 OS << "(";
1004 bool Comma = false;
1005 for (const SDDbgOperand &Op : getLocationOps()) {
1006 if (Comma)
1007 OS << ", ";
1008 switch (Op.getKind()) {
1010 if (Op.getSDNode())
1011 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1012 else
1013 OS << "SDNODE";
1014 break;
1016 OS << "CONST";
1017 break;
1019 OS << "FRAMEIX=" << Op.getFrameIx();
1020 break;
1021 case SDDbgOperand::VREG:
1022 OS << "VREG=" << printReg(Op.getVReg());
1023 break;
1024 }
1025 Comma = true;
1026 }
1027 OS << ")";
1028 if (isIndirect()) OS << "(Indirect)";
1029 if (isVariadic())
1030 OS << "(Variadic)";
1031 OS << ":\"" << Var->getName() << '"';
1032#ifndef NDEBUG
1033 if (Expr->getNumElements())
1034 Expr->dump();
1035#endif
1036}
1037
1038#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1040 if (isInvalidated())
1041 return;
1042 print(dbgs());
1043 dbgs() << "\n";
1044}
1045#endif
1046
1047/// Return true if this node is so simple that we should just print it inline
1048/// if it appears as an operand.
1049static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1050 // Avoid lots of cluttering when inline printing nodes with associated
1051 // DbgValues in verbose mode.
1052 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1053 return false;
1054 if (Node.getOpcode() == ISD::EntryToken)
1055 return false;
1056 return Node.getNumOperands() == 0;
1057}
1058
1059#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1060static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1061 for (const SDValue &Op : N->op_values()) {
1062 if (shouldPrintInline(*Op.getNode(), G))
1063 continue;
1064 if (Op.getNode()->hasOneUse())
1065 DumpNodes(Op.getNode(), indent+2, G);
1066 }
1067
1068 dbgs().indent(indent);
1069 N->dump(G);
1070}
1071
1072LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1073 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1074
1075 auto dumpEachNode = [this](const SDNode &N) {
1076 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1077 (!shouldPrintInline(N, this) || N.use_empty()))
1078 DumpNodes(&N, 2, this);
1079 };
1080
1081 if (Sorted) {
1082 SmallVector<const SDNode *> SortedNodes;
1083 SortedNodes.reserve(AllNodes.size());
1084 getTopologicallyOrderedNodes(SortedNodes);
1085 for (const SDNode *N : SortedNodes)
1086 dumpEachNode(*N);
1087 } else {
1088 for (const SDNode &N : allnodes())
1089 dumpEachNode(N);
1090 }
1091
1092 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1093 dbgs() << "\n";
1094
1095 if (VerboseDAGDumping) {
1096 if (DbgBegin() != DbgEnd())
1097 dbgs() << "SDDbgValues:\n";
1098 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1099 Dbg->dump();
1101 dbgs() << "Byval SDDbgValues:\n";
1102 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1103 Dbg->dump();
1104 }
1105 dbgs() << "\n";
1106}
1107#endif
1108
1109void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1110 OS << PrintNodeId(*this) << ": ";
1111 print_types(OS, G);
1112 OS << " = " << getOperationName(G);
1113 print_details(OS, G);
1114}
1115
1116static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1117 const SDValue Value) {
1118 if (!Value.getNode()) {
1119 OS << "<null>";
1120 return false;
1121 }
1122
1123 if (shouldPrintInline(*Value.getNode(), G)) {
1124 OS << Value->getOperationName(G) << ':';
1125 Value->print_types(OS, G);
1126 Value->print_details(OS, G);
1127 return true;
1128 }
1129
1130 OS << PrintNodeId(*Value.getNode());
1131 if (unsigned RN = Value.getResNo())
1132 OS << ':' << RN;
1133 return false;
1134}
1135
1136#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1138
1139static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1140 const SelectionDAG *G, VisitedSDNodeSet &once) {
1141 if (!once.insert(N).second) // If we've been here before, return now.
1142 return;
1143
1144 // Dump the current SDNode, but don't end the line yet.
1145 OS.indent(indent);
1146 N->printr(OS, G);
1147
1148 // Having printed this SDNode, walk the children:
1149 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1150 if (i) OS << ",";
1151 OS << " ";
1152
1153 const SDValue Op = N->getOperand(i);
1154 bool printedInline = printOperand(OS, G, Op);
1155 if (printedInline)
1156 once.insert(Op.getNode());
1157 }
1158
1159 OS << "\n";
1160
1161 // Dump children that have grandchildren on their own line(s).
1162 for (const SDValue &Op : N->op_values())
1163 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1164}
1165
1167 VisitedSDNodeSet once;
1168 DumpNodesr(dbgs(), this, 0, nullptr, once);
1169}
1170
1172 VisitedSDNodeSet once;
1173 DumpNodesr(dbgs(), this, 0, G, once);
1174}
1175#endif
1176
1178 const SelectionDAG *G, unsigned depth,
1179 unsigned indent) {
1180 if (depth == 0)
1181 return;
1182
1183 OS.indent(indent);
1184
1185 N->print(OS, G);
1186
1187 for (const SDValue &Op : N->op_values()) {
1188 // Don't follow chain operands.
1189 if (Op.getValueType() == MVT::Other)
1190 continue;
1191 // Don't print children that were fully rendered inline.
1192 if (shouldPrintInline(*Op.getNode(), G))
1193 continue;
1194 OS << '\n';
1195 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1196 }
1197}
1198
1200 unsigned depth) const {
1201 printrWithDepthHelper(OS, this, G, depth, 0);
1202}
1203
1205 // Don't print impossibly deep things.
1206 printrWithDepth(OS, G, 10);
1207}
1208
1209#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1211void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1212 printrWithDepth(dbgs(), G, depth);
1213}
1214
1216 // Don't print impossibly deep things.
1217 dumprWithDepth(G, 10);
1218}
1219#endif
1220
1221void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1222 printr(OS, G);
1223 // Under VerboseDAGDumping divergence will be printed always.
1225 OS << " # D:1";
1226 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1227 if (i) OS << ", "; else OS << " ";
1228 printOperand(OS, G, getOperand(i));
1229 }
1230 if (DebugLoc DL = getDebugLoc()) {
1231 OS << ", ";
1232 DL.print(OS);
1233 }
1234}
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:638
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition MD5.cpp:56
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
static Printable PrintNodeId(const SDNode &Node)
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
static const fltSemantics & IEEEsingle()
Definition APFloat.h:296
static const fltSemantics & IEEEdouble()
Definition APFloat.h:297
A debug info location.
Definition DebugLoc.h:124
Module * getParent()
Get the module that this global value is contained inside of...
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition Metadata.h:1078
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
LLVM_ABI void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
friend class SelectionDAG
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
LLVM_ABI void dump(bool Sorted=false) const
Dump the textual format of this DAG.
SDDbgInfo::DbgIterator DbgEnd() const
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void reserve(size_type N)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:225
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition Value.h:75
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
static constexpr Colors BLACK
static constexpr Colors GREEN
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
static constexpr Colors BLUE
static constexpr Colors RED
static constexpr Colors MAGENTA
static constexpr Colors YELLOW
static constexpr Colors CYAN
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Abstract Attribute helper functions.
Definition Attributor.h:165
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:807
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:256
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:780
@ TargetConstantPool
Definition ISDOpcodes.h:184
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:504
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:231
@ LOOP_DEPENDENCE_RAW_MASK
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:163
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:531
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:270
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:593
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:771
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:387
@ TargetBlockAddress
Definition ISDOpcodes.h:186
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:289
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:140
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:515
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:259
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:393
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:841
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:511
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:215
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:167
@ GlobalAddress
Definition ISDOpcodes.h:88
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:464
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:868
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:577
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:410
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:744
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:898
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:275
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:521
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:508
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:249
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:400
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:431
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:151
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:832
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:712
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:478
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:662
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
@ TargetExternalSymbol
Definition ISDOpcodes.h:185
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:779
@ TargetJumpTable
Definition ISDOpcodes.h:183
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:193
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:861
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:815
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:347
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:628
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:688
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:534
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:541
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:369
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:784
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:228
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:242
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:669
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:225
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:343
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:180
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:958
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:701
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:762
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:642
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:607
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:463
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:134
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:569
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:219
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:838
@ TargetConstantFP
Definition ISDOpcodes.h:175
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:799
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:130
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:379
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:351
@ TargetFrameIndex
Definition ISDOpcodes.h:182
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:887
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:876
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:724
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:633
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:406
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:793
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:323
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:477
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:457
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:145
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:471
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:493
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:470
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:914
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:174
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:498
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:736
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:200
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:732
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:280
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:707
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:299
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:420
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:678
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:236
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:558
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition ISDOpcodes.h:654
@ ExternalSymbol
Definition ISDOpcodes.h:93
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:947
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:696
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:909
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:451
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:933
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:157
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:844
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:821
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:527
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:360
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:617
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:859
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:719
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:863
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:333
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:208
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:181
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:549
@ LOOP_DEPENDENCE_WAR_MASK
Set rounding mode.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
std::string utostr(uint64_t X, bool isNeg=false)
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
DWARFExpression::Operation Op
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".