MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has. More...

#include "llvm/MC/MCRegisterInfo.h"

Inheritance diagram for llvm::MCRegisterInfo:

[legend]

Classes
struct	DwarfLLVMRegPair
	DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary search. More...

Public Types
using	regclass_iterator = const MCRegisterClass *

Public Member Functions
iterator_range< MCSubRegIterator >	subregs (MCRegister Reg) const
	Return an iterator range over all sub-registers of `Reg`, excluding `Reg`.
iterator_range< MCSubRegIterator >	subregs_inclusive (MCRegister Reg) const
	Return an iterator range over all sub-registers of `Reg`, including `Reg`.
iterator_range< MCSuperRegIterator >	superregs (MCRegister Reg) const
	Return an iterator range over all super-registers of `Reg`, excluding `Reg`.
iterator_range< MCSuperRegIterator >	superregs_inclusive (MCRegister Reg) const
	Return an iterator range over all super-registers of `Reg`, including `Reg`.
detail::concat_range< const MCPhysReg, iterator_range< MCSubRegIterator >, iterator_range< MCSuperRegIterator > >	sub_and_superregs_inclusive (MCRegister Reg) const
	Return an iterator range over all sub- and super-registers of `Reg`, including `Reg`.
iota_range< MCRegUnit >	regunits () const
	Returns an iterator range over all regunits.
iterator_range< MCRegUnitIterator >	regunits (MCRegister Reg) const
	Returns an iterator range over all regunits for `Reg`.
virtual	~MCRegisterInfo ()=default
void	InitMCRegisterInfo (const MCRegisterDesc D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass C, unsigned NC, const MCPhysReg(RURoots)[2], unsigned NRU, const int16_t DL, const LaneBitmask RUMS, const char Strings, const char ClassStrings, const uint16_t SubIndices, unsigned NumIndices, const uint16_t RET, const unsigned(RUI)[2]=nullptr)
	Initialize MCRegisterInfo, called by TableGen auto-generated routines.
void	mapLLVMRegsToDwarfRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize LLVM register to Dwarf register number mapping.
void	mapDwarfRegsToLLVMRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
	Used to initialize Dwarf register to LLVM register number mapping.
void	mapLLVMRegToSEHReg (MCRegister LLVMReg, int SEHReg)
	mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
void	mapLLVMRegToCVReg (MCRegister LLVMReg, int CVReg)
MCRegister	getRARegister () const
	This method should return the register where the return address can be found.
MCRegister	getProgramCounter () const
	Return the register which is the program counter.
const MCRegisterDesc &	operator[] (MCRegister Reg) const
const MCRegisterDesc &	get (MCRegister Reg) const
	Provide a get method, equivalent to [], but more useful with a pointer to this object.
MCRegister	getSubReg (MCRegister Reg, unsigned Idx) const
	Returns the physical register number of sub-register "Index" for physical register RegNo.
MCRegister	getMatchingSuperReg (MCRegister Reg, unsigned SubIdx, const MCRegisterClass *RC) const
	Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
unsigned	getSubRegIndex (MCRegister RegNo, MCRegister SubRegNo) const
	For a given register pair, return the sub-register index if the second register is a sub-register of the first.
const char *	getName (MCRegister RegNo) const
	Return the human-readable symbolic target-specific name for the specified physical register.
bool	isConstant (MCRegister RegNo) const
	Returns true if the given register is constant.
bool	isArtificial (MCRegister RegNo) const
	Returns true if the given register is artificial, which means it represents a regunit that is not separately addressable but still needs to be modelled, such as the top 16-bits of a 32-bit GPR.
bool	isArtificialRegUnit (MCRegUnit Unit) const
	Returns true when the given register unit is considered artificial.
unsigned	getNumRegs () const
	Return the number of registers this target has (useful for sizing arrays holding per register information)
unsigned	getNumSubRegIndices () const
	Return the number of sub-register indices understood by the target.
unsigned	getNumRegUnits () const
	Return the number of (native) register units in the target.
virtual int64_t	getDwarfRegNum (MCRegister Reg, bool isEH) const
	Map a target register to an equivalent dwarf register number.
std::optional< MCRegister >	getLLVMRegNum (uint64_t RegNum, bool isEH) const
	Map a dwarf register back to a target register.
int64_t	getDwarfRegNumFromDwarfEHRegNum (uint64_t RegNum) const
	Map a target EH register number to an equivalent DWARF register number.
int	getSEHRegNum (MCRegister Reg) const
	Map a target register to an equivalent SEH register number.
int	getCodeViewRegNum (MCRegister Reg) const
	Map a target register to an equivalent CodeView register number.
regclass_iterator	regclass_begin () const
regclass_iterator	regclass_end () const
iterator_range< regclass_iterator >	regclasses () const
unsigned	getNumRegClasses () const
const MCRegisterClass &	getRegClass (unsigned i) const
	Returns the register class associated with the enumeration value.
const char *	getRegClassName (const MCRegisterClass *Class) const
uint16_t	getEncodingValue (MCRegister Reg) const
	Returns the encoding for Reg.
bool	isSubRegister (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a sub-register of RegA.
bool	isSuperRegister (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register of RegA.
bool	isSubRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a sub-register of RegA or if RegB == RegA.
bool	isSuperRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register of RegA or if RegB == RegA.
bool	isSuperOrSubRegisterEq (MCRegister RegA, MCRegister RegB) const
	Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
bool	regsOverlap (MCRegister RegA, MCRegister RegB) const
	Returns true if the two registers are equal or alias each other.
bool	hasRegUnitIntervals () const
	Returns true if this target uses regunit intervals.
iota_range< unsigned >	regunits_interval (MCRegister Reg) const
	Returns an iterator range over all native regunits in the RegUnitInterval table for `Reg`.

Friends
class	MCSubRegIterator
class	MCSubRegIndexIterator
class	MCSuperRegIterator
class	MCRegUnitIterator
class	MCRegUnitMaskIterator
class	MCRegUnitRootIterator
class	MCRegAliasIterator

Detailed Description

MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has.

As such, we simply have to track a pointer to this array so that we can turn register number into a register descriptor.

Note this class is designed to be a base class of TargetRegisterInfo, which is the interface used by codegen. However, specific targets should never specialize this class. MCRegisterInfo should only contain getters to access TableGen generated physical register data. It must not be extended with virtual methods.

Definition at line 162 of file MCRegisterInfo.h.

Member Typedef Documentation

◆ regclass_iterator

using llvm::MCRegisterInfo::regclass_iterator = const MCRegisterClass *

Definition at line 164 of file MCRegisterInfo.h.

Constructor & Destructor Documentation

◆ ~MCRegisterInfo()

virtual llvm::MCRegisterInfo::~MCRegisterInfo ( )

virtualdefault

Member Function Documentation

◆ get()

const MCRegisterDesc & llvm::MCRegisterInfo::get ( MCRegister Reg ) const

inline

Provide a get method, equivalent to [], but more useful with a pointer to this object.

Definition at line 393 of file MCRegisterInfo.h.

References operator[](), and Reg.

Referenced by getName(), llvm::LLVMDisasmContext::getRegisterInfo(), getSubReg(), getSubRegIndex(), isArtificial(), isConstant(), llvm::MCRegUnitIterator::MCRegUnitIterator(), llvm::MCRegUnitMaskIterator::MCRegUnitMaskIterator(), llvm::MCSubRegIndexIterator::MCSubRegIndexIterator(), llvm::MCSubRegIterator::MCSubRegIterator(), and llvm::MCSuperRegIterator::MCSuperRegIterator().

◆ getCodeViewRegNum()

int MCRegisterInfo::getCodeViewRegNum ( MCRegister Reg ) const

Map a target register to an equivalent CodeView register number.

Definition at line 201 of file MCRegisterInfo.cpp.

References getName(), getNumRegs(), I, and llvm::report_fatal_error().

Referenced by printFPOReg().

◆ getDwarfRegNum()

int64_t MCRegisterInfo::getDwarfRegNum	(	MCRegister	Reg,
		bool	isEH ) const

virtual

Map a target register to an equivalent dwarf register number.

Returns -1 if there is no equivalent value. The second parameter allows targets to use different numberings for EH info and debugging info.

Definition at line 144 of file MCRegisterInfo.cpp.

References I, llvm::InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key, and Size.

Referenced by llvm::SIFrameLowering::buildCFIForSameValue(), llvm::SIFrameLowering::buildCFIForSGPRToVGPRSpill(), llvm::SIFrameLowering::buildCFIForSGPRToVGPRSpill(), llvm::SIFrameLowering::buildCFIForSGPRToVMEMSpill(), llvm::SIFrameLowering::buildCFIForVGPRToVMEMSpill(), llvm::SIFrameLowering::buildCFIForVRegToVRegSpill(), buildDefCFAReg(), createAArch64MCAsmInfo(), createARMMCAsmInfo(), createCSKYMCAsmInfo(), createHexagonMCAsmInfo(), createLoongArchMCAsmInfo(), createM68kMCAsmInfo(), createMipsMCAsmInfo(), createMSP430MCAsmInfo(), createPPCMCAsmInfo(), createRISCVMCAsmInfo(), createSparcMCAsmInfo(), createSparcV9MCAsmInfo(), createSystemZMCAsmInfo(), createVEMCAsmInfo(), createX86MCAsmInfo(), llvm::MSP430FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(), llvm::SIFrameLowering::emitCSRSpillStores(), llvm::ARCFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), llvm::SystemZELFFrameLowering::emitPrologue(), llvm::XCoreFrameLowering::emitPrologue(), llvm::XtensaFrameLowering::emitPrologue(), getDwarfRegNumFromDwarfEHRegNum(), llvm::PPCFrameLowering::inlineStackProbe(), and llvm::MachineFunction::replaceFrameInstRegister().

◆ getDwarfRegNumFromDwarfEHRegNum()

int64_t MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum ( uint64_t RegNum ) const

Map a target EH register number to an equivalent DWARF register number.

Definition at line 175 of file MCRegisterInfo.cpp.

References getDwarfRegNum(), and getLLVMRegNum().

◆ getEncodingValue()

uint16_t llvm::MCRegisterInfo::getEncodingValue ( MCRegister Reg ) const

inline

Returns the encoding for Reg.

Definition at line 495 of file MCRegisterInfo.h.

References assert(), and Reg.

Referenced by collectHWRegs(), getRegForPrinting(), getRegFromMIA(), llvm::Xtensa::getUserRegister(), llvm::AMDGPU::getVGPREncodingMSBs(), llvm::AMDGPU::getVGPRWithMSBs(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::X86_MC::initLLVMToSEHAndCVRegMapping(), llvm::AMDGPU::isHi16Reg(), llvm::MipsRegInfoRecord::SetPhysRegUsed(), and llvm::AArch64ExternalSymbolizer::tryAddingSymbolicOperand().

◆ getLLVMRegNum()

std::optional< MCRegister > MCRegisterInfo::getLLVMRegNum	(	uint64_t	RegNum,
		bool	isEH ) const

Map a dwarf register back to a target register.

Returns std::nullopt if there is no mapping.

Definition at line 161 of file MCRegisterInfo.cpp.

References llvm::MCRegister::from(), I, llvm::InnerAnalysisManagerProxy< AnalysisManagerT, IRUnitT, ExtraArgTs... >::Key, and Size.

Referenced by getDwarfRegNumFromDwarfEHRegNum().

◆ getMatchingSuperReg()

MCRegister MCRegisterInfo::getMatchingSuperReg	(	MCRegister	Reg,
		unsigned	SubIdx,
		const MCRegisterClass *	RC ) const

Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.

Definition at line 108 of file MCRegisterInfo.cpp.

References llvm::MCRegisterClass::contains(), getSubReg(), and superregs().

Referenced by adjustMFMA_F8F6F4OpRegClass(), convertVRToVRMx(), DecodeGPRPairCRegisterClass(), DecodeGPRPairRegisterClass(), DecodeVectorRegisterClass(), and llvm::TargetRegisterInfo::getMatchingSuperReg().

◆ getName()

const char * llvm::MCRegisterInfo::getName ( MCRegister RegNo ) const

inline

Return the human-readable symbolic target-specific name for the specified physical register.

Definition at line 414 of file MCRegisterInfo.h.

References get().

Referenced by getCodeViewRegNum().

◆ getNumRegClasses()

unsigned llvm::MCRegisterInfo::getNumRegClasses ( ) const

inline

Definition at line 479 of file MCRegisterInfo.h.

References regclass_begin(), and regclass_end().

Referenced by getRegClass().

◆ getNumRegs()

unsigned llvm::MCRegisterInfo::getNumRegs ( ) const

inline

Return the number of registers this target has (useful for sizing arrays holding per register information)

Definition at line 433 of file MCRegisterInfo.h.

Referenced by llvm::MachineFunction::allocateRegMask(), llvm::TargetRegisterInfo::checkAllSuperRegsMarked(), llvm::TargetRegisterInfo::getAllocatableSet(), getCodeViewRegNum(), llvm::TargetRegisterInfo::getNumSupportedRegs(), llvm::TargetRegisterInfo::getRegisterCosts(), getSubRegIndex(), llvm::MachineRegisterInfo::MachineRegisterInfo(), populateReservedIdentifiers(), and llvm::TargetRegisterInfo::regmaskSubsetEqual().

◆ getNumRegUnits()

unsigned llvm::MCRegisterInfo::getNumRegUnits ( ) const

inline

Return the number of (native) register units in the target.

Register units are numbered from 0 to getNumRegUnits() - 1. They can be accessed through MCRegUnitIterator defined below.

Definition at line 447 of file MCRegisterInfo.h.

Referenced by llvm::MCRegUnitRootIterator::MCRegUnitRootIterator(), and regunits().

◆ getNumSubRegIndices()

unsigned llvm::MCRegisterInfo::getNumSubRegIndices ( ) const

inline

Return the number of sub-register indices understood by the target.

Index 0 is reserved for the no-op sub-register, while 1 to getNumSubRegIndices() - 1 represent real sub-registers.

Definition at line 440 of file MCRegisterInfo.h.

Referenced by llvm::TargetRegisterInfo::getCoveringSubRegIndexes(), getSubReg(), llvm::TargetRegisterInfo::getSubRegIdxOffset(), llvm::TargetRegisterInfo::getSubRegIdxSize(), llvm::TargetRegisterInfo::getSubRegIndexLaneMask(), and llvm::TargetRegisterInfo::getSubRegIndexName().

◆ getProgramCounter()

MCRegister llvm::MCRegisterInfo::getProgramCounter ( ) const

inline

Return the register which is the program counter.

Definition at line 381 of file MCRegisterInfo.h.

Referenced by llvm::MCInstrAnalysis::mayAffectControlFlow(), and llvm::MCInstrDesc::mayAffectControlFlow().

◆ getRARegister()

MCRegister llvm::MCRegisterInfo::getRARegister ( ) const

inline

This method should return the register where the return address can be found.

Definition at line 376 of file MCRegisterInfo.h.

Referenced by llvm::MipsAsmPrinter::emitFrameDirective().

◆ getRegClass()

const MCRegisterClass & llvm::MCRegisterInfo::getRegClass ( unsigned i ) const

inline

Returns the register class associated with the enumeration value.

See class MCOperandInfo.

Definition at line 485 of file MCRegisterInfo.h.

References assert(), and getNumRegClasses().

Referenced by adjustMFMA_F8F6F4OpRegClass(), CheckVGPROverflow(), llvm::X86_MC::X86MCInstrAnalysis::clearsSuperRegisters(), cvtVOP3DstOpSelOnly(), llvm::MipsTargetLowering::getRegisterByName(), llvm::AMDGPU::getVGPRPhysRegClass(), IsAGPROperand(), llvm::HexagonMCInstrInfo::isPredReg(), and matchAliasCondition().

◆ getRegClassName()

const char * llvm::MCRegisterInfo::getRegClassName ( const MCRegisterClass * Class ) const

inline

Definition at line 490 of file MCRegisterInfo.h.

Referenced by llvm::AMDGPUDisassembler::getRegClassName(), and llvm::TargetRegisterInfo::getRegClassName().

◆ getSEHRegNum()

int MCRegisterInfo::getSEHRegNum ( MCRegister Reg ) const

Map a target register to an equivalent SEH register number.

Returns LLVM register number if there is no equivalent value.

Definition at line 194 of file MCRegisterInfo.cpp.

References I.

◆ getSubReg()

MCRegister MCRegisterInfo::getSubReg	(	MCRegister	Reg,
		unsigned	Idx ) const

Returns the physical register number of sub-register "Index" for physical register RegNo.

Return zero if the sub-register does not exist.

Definition at line 116 of file MCRegisterInfo.cpp.

References assert(), get(), getNumSubRegIndices(), llvm::Sub, llvm::MCRegisterDesc::SubRegIndices, and subregs().

Referenced by addSavedGPR(), adjustMFMA_F8F6F4OpRegClass(), llvm::VirtRegAuxInfo::allUsesAvailableAt(), llvm::TargetRegisterInfo::checkSubRegInterference(), CheckVGPROverflow(), llvm::AMDGPU::VOPD::InstInfo::getInvalidCompOperandIndex(), getMatchingSuperReg(), getPairedGPR(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), IsAGPROperand(), llvm::PPCRegisterInfo::lowerACCSpilling(), llvm::PPCRegisterInfo::lowerDMRRestore(), llvm::PPCRegisterInfo::lowerDMRSpilling(), and llvm::SystemZAsmPrinter::PrintAsmOperand().

◆ getSubRegIndex()

unsigned MCRegisterInfo::getSubRegIndex	(	MCRegister	RegNo,
		MCRegister	SubRegNo ) const

For a given register pair, return the sub-register index if the second register is a sub-register of the first.

Return zero otherwise.

Definition at line 130 of file MCRegisterInfo.cpp.

References assert(), get(), getNumRegs(), llvm::Sub, llvm::MCRegisterDesc::SubRegIndices, and subregs().

◆ hasRegUnitIntervals()

bool llvm::MCRegisterInfo::hasRegUnitIntervals ( ) const

inline

Returns true if this target uses regunit intervals.

Definition at line 530 of file MCRegisterInfo.h.

Referenced by regunits_interval().

◆ InitMCRegisterInfo()

void llvm::MCRegisterInfo::InitMCRegisterInfo	(	const MCRegisterDesc *	D,
		unsigned	NR,
		unsigned	RA,
		unsigned	PC,
		const MCRegisterClass *	C,
		unsigned	NC,
		const MCPhysReg(*)	RURoots[2],
		unsigned	NRU,
		const int16_t *	DL,
		const LaneBitmask *	RUMS,
		const char *	Strings,
		const char *	ClassStrings,
		const uint16_t *	SubIndices,
		unsigned	NumIndices,
		const uint16_t *	RET,
		const unsigned(*)	RUI[2] = nullptr )

inline

Initialize MCRegisterInfo, called by TableGen auto-generated routines.

DO NOT USE.

Definition at line 295 of file MCRegisterInfo.h.

References llvm::CallingConv::C, D(), DL, NC, and RA.

◆ isArtificial()

bool llvm::MCRegisterInfo::isArtificial ( MCRegister RegNo ) const

inline

Returns true if the given register is artificial, which means it represents a regunit that is not separately addressable but still needs to be modelled, such as the top 16-bits of a 32-bit GPR.

Definition at line 424 of file MCRegisterInfo.h.

References get().

Referenced by llvm::getTrackingRegs(), isArtificialRegUnit(), and llvm::mca::isNonArtificial().

◆ isArtificialRegUnit()

bool MCRegisterInfo::isArtificialRegUnit ( MCRegUnit Unit ) const

Returns true when the given register unit is considered artificial.

Register units are considered artificial when at least one of the root registers is artificial.

Definition at line 225 of file MCRegisterInfo.cpp.

References isArtificial(), and MCRegUnitRootIterator.

◆ isConstant()

bool llvm::MCRegisterInfo::isConstant ( MCRegister RegNo ) const

inline

Returns true if the given register is constant.

Definition at line 419 of file MCRegisterInfo.h.

References get().

Referenced by llvm::getTrackingRegs().

◆ isSubRegister()

bool llvm::MCRegisterInfo::isSubRegister	(	MCRegister	RegA,
		MCRegister	RegB ) const

inline

Returns true if RegB is a sub-register of RegA.

Definition at line 502 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by llvm::MCInstrDesc::hasImplicitDefOfPhysReg().

◆ isSubRegisterEq()

bool llvm::MCRegisterInfo::isSubRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB ) const

inline

Returns true if RegB is a sub-register of RegA or if RegB == RegA.

Definition at line 510 of file MCRegisterInfo.h.

References isSuperRegisterEq().

Referenced by llvm::MCInstrDesc::hasExplicitDefOfPhysReg(), and isSuperOrSubRegisterEq().

◆ isSuperOrSubRegisterEq()

bool llvm::MCRegisterInfo::isSuperOrSubRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB ) const

inline

Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.

Definition at line 522 of file MCRegisterInfo.h.

References isSubRegisterEq(), and isSuperRegister().

◆ isSuperRegister()

bool llvm::MCRegisterInfo::isSuperRegister	(	MCRegister	RegA,
		MCRegister	RegB ) const

inline

Returns true if RegB is a super-register of RegA.

Definition at line 657 of file MCRegisterInfo.h.

References llvm::is_contained(), and superregs().

Referenced by isSubRegister(), isSuperOrSubRegisterEq(), and isSuperRegisterEq().

◆ isSuperRegisterEq()

bool llvm::MCRegisterInfo::isSuperRegisterEq	(	MCRegister	RegA,
		MCRegister	RegB ) const

inline

Returns true if RegB is a super-register of RegA or if RegB == RegA.

Definition at line 516 of file MCRegisterInfo.h.

References isSuperRegister().

Referenced by isSubRegisterEq().

◆ mapDwarfRegsToLLVMRegs()

void llvm::MCRegisterInfo::mapDwarfRegsToLLVMRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH )

inline

Used to initialize Dwarf register to LLVM register number mapping.

Called by TableGen auto-generated routines. DO NOT USE.

Definition at line 350 of file MCRegisterInfo.h.

References Size.

◆ mapLLVMRegsToDwarfRegs()

void llvm::MCRegisterInfo::mapLLVMRegsToDwarfRegs	(	const DwarfLLVMRegPair *	Map,
		unsigned	Size,
		bool	isEH )

inline

Used to initialize LLVM register to Dwarf register number mapping.

Called by TableGen auto-generated routines. DO NOT USE.

Definition at line 336 of file MCRegisterInfo.h.

References Size.

◆ mapLLVMRegToCVReg()

void llvm::MCRegisterInfo::mapLLVMRegToCVReg	(	MCRegister	LLVMReg,
		int	CVReg )

inline

Definition at line 370 of file MCRegisterInfo.h.

Referenced by llvm::AArch64_MC::initLLVMToCVRegMapping(), llvm::ARM_MC::initLLVMToCVRegMapping(), llvm::MIPS_MC::initLLVMToCVRegMapping(), and llvm::X86_MC::initLLVMToSEHAndCVRegMapping().

◆ mapLLVMRegToSEHReg()

void llvm::MCRegisterInfo::mapLLVMRegToSEHReg	(	MCRegister	LLVMReg,
		int	SEHReg )

inline

mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.

By default the SEH register number is just the same as the LLVM register number. FIXME: TableGen these numbers. Currently this requires target specific initialization code.

Definition at line 366 of file MCRegisterInfo.h.

Referenced by llvm::X86_MC::initLLVMToSEHAndCVRegMapping().

◆ operator[]()

const MCRegisterDesc & llvm::MCRegisterInfo::operator[] ( MCRegister Reg ) const

inline

Definition at line 385 of file MCRegisterInfo.h.

References assert(), and Reg.

Referenced by get().

◆ regclass_begin()

regclass_iterator llvm::MCRegisterInfo::regclass_begin ( ) const

inline

Definition at line 473 of file MCRegisterInfo.h.

Referenced by getNumRegClasses(), and regclasses().

◆ regclass_end()

regclass_iterator llvm::MCRegisterInfo::regclass_end ( ) const

inline

Definition at line 474 of file MCRegisterInfo.h.

Referenced by getNumRegClasses(), and regclasses().

◆ regclasses()

iterator_range< regclass_iterator > llvm::MCRegisterInfo::regclasses ( ) const

inline

Definition at line 475 of file MCRegisterInfo.h.

References llvm::make_range(), regclass_begin(), and regclass_end().

Referenced by llvm::getSuperRegs().

◆ regsOverlap()

bool MCRegisterInfo::regsOverlap	(	MCRegister	RegA,
		MCRegister	RegB ) const

Returns true if the two registers are equal or alias each other.

Definition at line 212 of file MCRegisterInfo.cpp.

References MCRegUnitIterator, and regunits().

Referenced by llvm::TargetRegisterInfo::checkSubRegInterference(), llvm::AArch64RegisterInfo::explainReservedReg(), llvm::AMDGPU::VOPD::InstInfo::getInvalidCompOperandIndex(), llvm::AArch64RegisterInfo::isAsmClobberable(), and llvm::TargetRegisterInfo::regsOverlap().

◆ regunits() [1/2]

iota_range< MCRegUnit > llvm::MCRegisterInfo::regunits ( ) const

inline

Returns an iterator range over all regunits.

Definition at line 833 of file MCRegisterInfo.h.

References llvm::enum_seq(), llvm::force_iteration_on_noniterable_enum, and getNumRegUnits().

Referenced by llvm::TargetRegisterInfo::hasRegUnit(), and regsOverlap().

◆ regunits() [2/2]

iterator_range< MCRegUnitIterator > llvm::MCRegisterInfo::regunits ( MCRegister Reg ) const

inline

Returns an iterator range over all regunits for Reg.

Definition at line 840 of file MCRegisterInfo.h.

References llvm::make_range(), MCRegUnitIterator, and Reg.

◆ regunits_interval()

iota_range< unsigned > llvm::MCRegisterInfo::regunits_interval ( MCRegister Reg ) const

inline

Returns an iterator range over all native regunits in the RegUnitInterval table for Reg.

Definition at line 534 of file MCRegisterInfo.h.

References assert(), hasRegUnitIntervals(), Reg, and llvm::seq().

◆ sub_and_superregs_inclusive()

detail::concat_range< const MCPhysReg, iterator_range< MCSubRegIterator >, iterator_range< MCSuperRegIterator > > llvm::MCRegisterInfo::sub_and_superregs_inclusive ( MCRegister Reg ) const